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| author | Tim Anderson <tanderson@mvista.com> | 2009-06-17 16:22:25 -0700 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-07-03 15:45:26 +0100 |
| commit | a214cef9a5d06894785dca1f967c9c324cc84c17 (patch) | |
| tree | 9cad1695afea9987ea979f59a614f39ef2ea8ada /arch/mips/kernel/irq-gic.c | |
| parent | 9306c8def6abc2dbde4ac75eb6c631606b8fc1dd (diff) | |
| download | op-kernel-dev-a214cef9a5d06894785dca1f967c9c324cc84c17.zip op-kernel-dev-a214cef9a5d06894785dca1f967c9c324cc84c17.tar.gz | |
MIPS: CMP: Extend IPI handling to CPU number
This takes the current IPI interrupt assignment from the fix number of 4
to the number of CPUs defined in the system.
Signed-off-by: Tim Anderson <tanderson@mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/irq-gic.c')
| -rw-r--r-- | arch/mips/kernel/irq-gic.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 5c85e1c..d2072cd 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c @@ -247,6 +247,10 @@ static void __init gic_basic_init(void) if (cpu == X) continue; + if (cpu == 0 && i != 0 && _intrmap[i].intrnum == 0 && + _intrmap[i].ipiflag == 0) + continue; + setup_intr(_intrmap[i].intrnum, _intrmap[i].cpunum, _intrmap[i].pin, |
