summaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/cpu-probe.c
diff options
context:
space:
mode:
authorIngo Molnar <mingo@elte.hu>2009-01-18 20:15:05 +0100
committerIngo Molnar <mingo@elte.hu>2009-01-18 20:15:05 +0100
commit4092762aebfe55c1f8e31440b80a053c2dbe519b (patch)
tree8fb9fd14131194174c12daf5d8195afd3b62bc3e /arch/mips/kernel/cpu-probe.c
parent745b1626dd71ce9661a05ea4db57859ed5c773d2 (diff)
parent1de9e8e70f5acc441550ca75433563d91b269bbe (diff)
downloadop-kernel-dev-4092762aebfe55c1f8e31440b80a053c2dbe519b.zip
op-kernel-dev-4092762aebfe55c1f8e31440b80a053c2dbe519b.tar.gz
Merge branch 'tracing/ftrace'; commit 'v2.6.29-rc2' into tracing/core
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c31
1 files changed, 29 insertions, 2 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index c9207b5..a7162a4 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -96,6 +96,9 @@ int allow_au1k_wait;
static void au1k_wait(void)
{
+ if (!allow_au1k_wait)
+ return;
+
/* using the wait instruction makes CP0 counter unusable */
__asm__(" .set mips3 \n"
" cache 0x14, 0(%0) \n"
@@ -154,6 +157,7 @@ void __init check_wait(void)
case CPU_25KF:
case CPU_PR4450:
case CPU_BCM3302:
+ case CPU_CAVIUM_OCTEON:
cpu_wait = r4k_wait;
break;
@@ -185,8 +189,7 @@ void __init check_wait(void)
case CPU_AU1200:
case CPU_AU1210:
case CPU_AU1250:
- if (allow_au1k_wait)
- cpu_wait = au1k_wait;
+ cpu_wait = au1k_wait;
break;
case CPU_20KC:
/*
@@ -875,6 +878,27 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
}
}
+static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
+{
+ decode_configs(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_CAVIUM_CN38XX:
+ case PRID_IMP_CAVIUM_CN31XX:
+ case PRID_IMP_CAVIUM_CN30XX:
+ case PRID_IMP_CAVIUM_CN58XX:
+ case PRID_IMP_CAVIUM_CN56XX:
+ case PRID_IMP_CAVIUM_CN50XX:
+ case PRID_IMP_CAVIUM_CN52XX:
+ c->cputype = CPU_CAVIUM_OCTEON;
+ __cpu_name[cpu] = "Cavium Octeon";
+ break;
+ default:
+ printk(KERN_INFO "Unknown Octeon chip!\n");
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
const char *__cpu_name[NR_CPUS];
__cpuinit void cpu_probe(void)
@@ -909,6 +933,9 @@ __cpuinit void cpu_probe(void)
case PRID_COMP_NXP:
cpu_probe_nxp(c, cpu);
break;
+ case PRID_COMP_CAVIUM:
+ cpu_probe_cavium(c, cpu);
+ break;
}
BUG_ON(!__cpu_name[cpu]);
OpenPOWER on IntegriCloud