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| author | Ralf Baechle <ralf@linux-mips.org> | 2007-11-24 22:33:28 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-11-26 17:26:14 +0000 |
| commit | 940f6b48a130e0a33cb8bd397dd0e277166470ad (patch) | |
| tree | 03bd36fcb9b5c8d77f5de2930ff32d770f5cdf4e /arch/mips/kernel/Makefile | |
| parent | 5aa85c9fc49a6ce44dc10a42e2011bbde9dc445a (diff) | |
| download | op-kernel-dev-940f6b48a130e0a33cb8bd397dd0e277166470ad.zip op-kernel-dev-940f6b48a130e0a33cb8bd397dd0e277166470ad.tar.gz | |
[MIPS] Only build r4k clocksource for systems that work ok with it.
In particular as-is it's not suited for multicore and mutiprocessors
systems where there is on guarantee that the counter are synchronized
or running from the same clock at all. This broke Sibyte and probably
others since the "[MIPS] Handle R4000/R4400 mfc0 from count register."
commit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/Makefile')
| -rw-r--r-- | arch/mips/kernel/Makefile | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index b551535..ffa0836 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o +obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ @@ -43,6 +44,7 @@ obj-$(CONFIG_CPU_TX49XX) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_CPU_VR41XX) += r4k_fpu.o r4k_switch.o obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_SMP_UP) += smp-up.o obj-$(CONFIG_MIPS_MT) += mips-mt.o obj-$(CONFIG_MIPS_MT_FPAFF) += mips-mt-fpaff.o |
