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| author | Paul Burton <paul.burton@imgtec.com> | 2015-05-24 16:11:23 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-06-21 21:53:00 +0200 |
| commit | 638c885185dc2e2b17e59bfe8e9d27b18ed8fade (patch) | |
| tree | a2460da7d2c01a724645a8d8f38b9fa88c675fd0 /arch/mips/jz4740 | |
| parent | 69ce4b2288d22ad23b8ceeb8c238fcc58a7e5089 (diff) | |
| download | op-kernel-dev-638c885185dc2e2b17e59bfe8e9d27b18ed8fade.zip op-kernel-dev-638c885185dc2e2b17e59bfe8e9d27b18ed8fade.tar.gz | |
MIPS: JZ4740: register an irq_domain for the interrupt controller
When probing the interrupt controller, register an IRQ domain such
that the interrupts can be translated by devicetree code & thus used
from devicetree.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Brian Norris <computersforpeace@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10140/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/jz4740')
| -rw-r--r-- | arch/mips/jz4740/irq.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c index ed51915..ddcf78a 100644 --- a/arch/mips/jz4740/irq.c +++ b/arch/mips/jz4740/irq.c @@ -85,6 +85,7 @@ static int __init jz4740_intc_of_init(struct device_node *node, { struct irq_chip_generic *gc; struct irq_chip_type *ct; + struct irq_domain *domain; int parent_irq; parent_irq = irq_of_parse_and_map(node, 0); @@ -113,6 +114,11 @@ static int __init jz4740_intc_of_init(struct device_node *node, irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL); + domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0, + &irq_domain_simple_ops, NULL); + if (!domain) + pr_warn("unable to register IRQ domain\n"); + setup_irq(parent_irq, &jz4740_cascade_action); return 0; } |
