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authorMaarten ter Huurne <maarten@treewalker.org>2011-05-02 11:47:00 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-05-19 09:55:48 +0100
commit6edde0247644db475f68f25dcb1bf72260600081 (patch)
treeaaa40d60aef5a4c23c37a69560f398768afb0fa7 /arch/mips/jz4740
parent9cbda726bb283d60cd4f34a3a9da8b5b48a46b0f (diff)
downloadop-kernel-dev-6edde0247644db475f68f25dcb1bf72260600081.zip
op-kernel-dev-6edde0247644db475f68f25dcb1bf72260600081.tar.gz
MIPS: JZ4740: setup: Autodetect physical memory.
Assume that the boot loader knows the physical memory of the system and deduce that information from the contents of the SDRAM control register. It is still possible to override with with the "mem=" parameter, but we have a sensible default now. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2319/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/jz4740')
-rw-r--r--arch/mips/jz4740/setup.c32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/mips/jz4740/setup.c b/arch/mips/jz4740/setup.c
index 6a9e14d..d97cfbf 100644
--- a/arch/mips/jz4740/setup.c
+++ b/arch/mips/jz4740/setup.c
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
+ * Copyright (C) 2011, Maarten ter Huurne <maarten@treewalker.org>
* JZ4740 setup code
*
* This program is free software; you can redistribute it and/or modify it
@@ -14,13 +15,44 @@
*/
#include <linux/init.h>
+#include <linux/io.h>
#include <linux/kernel.h>
+#include <asm/bootinfo.h>
+
+#include <asm/mach-jz4740/base.h>
+
#include "reset.h"
+
+#define JZ4740_EMC_SDRAM_CTRL 0x80
+
+
+static void __init jz4740_detect_mem(void)
+{
+ void __iomem *jz_emc_base;
+ u32 ctrl, bus, bank, rows, cols;
+ phys_t size;
+
+ jz_emc_base = ioremap(JZ4740_EMC_BASE_ADDR, 0x100);
+ ctrl = readl(jz_emc_base + JZ4740_EMC_SDRAM_CTRL);
+ bus = 2 - ((ctrl >> 31) & 1);
+ bank = 1 + ((ctrl >> 19) & 1);
+ cols = 8 + ((ctrl >> 26) & 7);
+ rows = 11 + ((ctrl >> 20) & 3);
+ printk(KERN_DEBUG
+ "SDRAM preconfigured: bus:%u bank:%u rows:%u cols:%u\n",
+ bus, bank, rows, cols);
+ iounmap(jz_emc_base);
+
+ size = 1 << (bus + bank + cols + rows);
+ add_memory_region(0, size, BOOT_MEM_RAM);
+}
+
void __init plat_mem_setup(void)
{
jz4740_reset_init();
+ jz4740_detect_mem();
}
const char *get_system_type(void)
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