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author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-11 23:46:09 +0100 |
commit | 584d98be3b90f00b410288e59eeba871fbf81b86 (patch) | |
tree | f78b1f537869d15f2bdd33c0a4f363c8fc6b256a /arch/mips/jazz/irq.c | |
parent | ea5804015c0ce67741eb4b156a071fb4f415345f (diff) | |
download | op-kernel-dev-584d98be3b90f00b410288e59eeba871fbf81b86.zip op-kernel-dev-584d98be3b90f00b410288e59eeba871fbf81b86.tar.gz |
[MIPS] Jazz clockevent driver
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/jazz/irq.c')
-rw-r--r-- | arch/mips/jazz/irq.c | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index 5623541..835b056 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c @@ -6,6 +6,7 @@ * Copyright (C) 1992 Linus Torvalds * Copyright (C) 1994 - 2001, 2003 Ralf Baechle */ +#include <linux/clockchips.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/kernel.h> @@ -105,3 +106,50 @@ asmlinkage void plat_irq_dispatch(void) panic("Unimplemented loc_no_irq handler"); } } + +static void r4030_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + /* Nothing to do ... */ +} + +struct clock_event_device r4030_clockevent = { + .name = "r4030", + .features = CLOCK_EVT_FEAT_PERIODIC, + .rating = 100, + .irq = JAZZ_TIMER_IRQ, + .cpumask = CPU_MASK_CPU0, + .set_mode = r4030_set_mode, +}; + +static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id) +{ + r4030_clockevent.event_handler(&r4030_clockevent); + + return IRQ_HANDLED; +} + +static struct irqaction r4030_timer_irqaction = { + .handler = r4030_timer_interrupt, + .flags = IRQF_DISABLED, + .mask = CPU_MASK_CPU0, + .name = "timer", +}; + +void __init plat_timer_setup(struct irqaction *ignored) +{ + struct irqaction *irq = &r4030_timer_irqaction; + + BUG_ON(HZ != 100); + + /* + * Set clock to 100Hz. + * + * The R4030 timer receives an input clock of 1kHz which is divieded by + * a programmable 4-bit divider. This makes it fairly inflexible. + */ + r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9); + setup_irq(JAZZ_TIMER_IRQ, irq); + + clockevents_register_device(&r4030_clockevent); +} |