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author | James Hogan <james.hogan@imgtec.com> | 2016-05-06 14:36:19 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-13 14:02:18 +0200 |
commit | 9b5c3399584b6f6aa755dbe11e3cef5776fd279d (patch) | |
tree | 52234bb21d945aaa67b85d56ce247ec0736adca5 /arch/mips/include | |
parent | 5fb59fd2e7f7ee6bfc20ab9c0ef82e33c0057be5 (diff) | |
download | op-kernel-dev-9b5c3399584b6f6aa755dbe11e3cef5776fd279d.zip op-kernel-dev-9b5c3399584b6f6aa755dbe11e3cef5776fd279d.tar.gz |
MIPS: Add & use CP0_EntryHi ASID definitions
Add definitions for the ASID field in CP0_EntryHi (along with the soon
to be used ASIDX field), and use them in a few previously hardcoded
cases.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13205/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/mipsregs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 1e9d337..b7705ef 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -229,6 +229,8 @@ /* MIPS32/64 EntryHI bit definitions */ #define MIPS_ENTRYHI_EHINV (_ULCAST_(1) << 10) +#define MIPS_ENTRYHI_ASIDX (_ULCAST_(0x3) << 8) +#define MIPS_ENTRYHI_ASID (_ULCAST_(0xff) << 0) /* * R4x00 interrupt enable / cause bits |