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authorPaul Burton <paul.burton@imgtec.com>2015-05-24 16:11:46 +0100
committerRalf Baechle <ralf@linux-mips.org>2015-06-21 21:53:26 +0200
commit5b9cdd2449098b3cd519a02dfed7588fd2becd0e (patch)
tree1409cc92ca54851249a9f0df91729b00a6abc5b3 /arch/mips/include
parent8838245d76b9bb2e20c9a7a977487d72c0117b9a (diff)
downloadop-kernel-dev-5b9cdd2449098b3cd519a02dfed7588fd2becd0e.zip
op-kernel-dev-5b9cdd2449098b3cd519a02dfed7588fd2becd0e.tar.gz
MIPS: ingenic: Initial JZ4780 support
Support the Ingenic JZ4780 SoC using the existing code under arch/mips/jz4740 now that it has been generalised sufficiently. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Joshua Kinard <kumba@gentoo.org> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/10164/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/cpu-type.h2
-rw-r--r--arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h3
-rw-r--r--arch/mips/include/asm/mach-jz4740/irq.h4
3 files changed, 5 insertions, 4 deletions
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 33f3cab..d41e8e2 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -32,12 +32,12 @@ static inline int __pure __get_cpu_type(const int cpu_type)
case CPU_4KC:
case CPU_ALCHEMY:
case CPU_PR4450:
- case CPU_JZRISC:
#endif
#if defined(CONFIG_SYS_HAS_CPU_MIPS32_R1) || \
defined(CONFIG_SYS_HAS_CPU_MIPS32_R2)
case CPU_4KEC:
+ case CPU_JZRISC:
#endif
#ifdef CONFIG_SYS_HAS_CPU_MIPS32_R2
diff --git a/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h b/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
index a225baa..0933f94 100644
--- a/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-jz4740/cpu-feature-overrides.h
@@ -12,8 +12,6 @@
#define cpu_has_3k_cache 0
#define cpu_has_4k_cache 1
#define cpu_has_tx39_cache 0
-#define cpu_has_fpu 0
-#define cpu_has_32fpr 0
#define cpu_has_counter 0
#define cpu_has_watch 1
#define cpu_has_divec 1
@@ -34,7 +32,6 @@
#define cpu_has_ic_fills_f_dc 0
#define cpu_has_pindexed_dcache 0
#define cpu_has_mips32r1 1
-#define cpu_has_mips32r2 0
#define cpu_has_mips64r1 0
#define cpu_has_mips64r2 0
#define cpu_has_dsp 0
diff --git a/arch/mips/include/asm/mach-jz4740/irq.h b/arch/mips/include/asm/mach-jz4740/irq.h
index b218f76..9b439fc 100644
--- a/arch/mips/include/asm/mach-jz4740/irq.h
+++ b/arch/mips/include/asm/mach-jz4740/irq.h
@@ -21,6 +21,8 @@
#ifdef CONFIG_MACH_JZ4740
# define NR_INTC_IRQS 32
+#else
+# define NR_INTC_IRQS 64
#endif
/* 1st-level interrupts */
@@ -48,6 +50,8 @@
#define JZ4740_IRQ_IPU JZ4740_IRQ(29)
#define JZ4740_IRQ_LCD JZ4740_IRQ(30)
+#define JZ4780_IRQ_TCU2 JZ4740_IRQ(25)
+
/* 2nd-level interrupts */
#define JZ4740_IRQ_DMA(x) (JZ4740_IRQ(NR_INTC_IRQS) + (x))
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