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author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 15:23:54 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-21 15:23:54 -0700 |
commit | 6969a434737dd82f7343e3fcd529bc320508d9fc (patch) | |
tree | 13d9982aa8fc5f5448ea678de2f1850d63802e79 /arch/mips/include | |
parent | 0fc377bd648d1935ea34665239e3f0a274b71698 (diff) | |
parent | 0453fb3c528c5eb3483441a466b24a4cb409eec5 (diff) | |
download | op-kernel-dev-6969a434737dd82f7343e3fcd529bc320508d9fc.zip op-kernel-dev-6969a434737dd82f7343e3fcd529bc320508d9fc.tar.gz |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (25 commits)
MIPS: Use GCC __builtin_prefetch() to implement prefetch().
MIPS: Octeon: Serial port fixes for OCTEON simulator.
MIPS: Octeon: Get rid of early serial.
MIPS: AR7: prevent race between clock initialization and devices registration
MIPS: AR7: use ar7_has_high_vlynq() to determine watchdog base address
MIPS: BCM63xx: Avoid namespace clash on GPIO_DIR_{IN,OUT}
MIPS: MTX-1: Update defconfig
MIPS: BCM47xx: Update defconfig
MIPS: RB532: Update defconfig
MIPS: AR7: Update defconfig
RTC: rtc-cmos: Fix binary mode support
MIPS: Oprofile: Loongson: Cleanup the comments
MIPS: Oprofile: Loongson: Cleanup of the macros
MIPS: Oprofile: Loongson: Remove unused variable from loongson2_cpu_setup()
MIPS: Oprofile: Loongson: Remove useless parentheses
MIPS: Oprofile: Loongson: Unify macro for setting events
MIPS: nofpu and nodsp only affect CPU0
MIPS: Clean up tables for bootmem allocation
MIPS: Coding style cleanups of access of FCSR rounding mode bits
MIPS: Loongson 2F: Add gpio/gpioilb support
...
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/mach-au1x00/au1000.h | 34 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 4 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/gpio.h | 35 | ||||
-rw-r--r-- | arch/mips/include/asm/processor.h | 12 |
6 files changed, 74 insertions, 17 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h index ae07423..e76941db 100644 --- a/arch/mips/include/asm/mach-au1x00/au1000.h +++ b/arch/mips/include/asm/mach-au1x00/au1000.h @@ -190,8 +190,6 @@ extern unsigned long au1xxx_calc_clock(void); /* PM: arch/mips/alchemy/common/sleeper.S, power.c, irq.c */ void au1xxx_save_and_sleep(void); void au_sleep(void); -void save_au1xxx_intctl(void); -void restore_au1xxx_intctl(void); /* SOC Interrupt numbers */ @@ -835,6 +833,38 @@ enum soc_au1200_ints { #define MEM_STNAND_DATA 0x20 #endif + +/* Interrupt Controller register offsets */ +#define IC_CFG0RD 0x40 +#define IC_CFG0SET 0x40 +#define IC_CFG0CLR 0x44 +#define IC_CFG1RD 0x48 +#define IC_CFG1SET 0x48 +#define IC_CFG1CLR 0x4C +#define IC_CFG2RD 0x50 +#define IC_CFG2SET 0x50 +#define IC_CFG2CLR 0x54 +#define IC_REQ0INT 0x54 +#define IC_SRCRD 0x58 +#define IC_SRCSET 0x58 +#define IC_SRCCLR 0x5C +#define IC_REQ1INT 0x5C +#define IC_ASSIGNRD 0x60 +#define IC_ASSIGNSET 0x60 +#define IC_ASSIGNCLR 0x64 +#define IC_WAKERD 0x68 +#define IC_WAKESET 0x68 +#define IC_WAKECLR 0x6C +#define IC_MASKRD 0x70 +#define IC_MASKSET 0x70 +#define IC_MASKCLR 0x74 +#define IC_RISINGRD 0x78 +#define IC_RISINGCLR 0x78 +#define IC_FALLINGRD 0x7C +#define IC_FALLINGCLR 0x7C +#define IC_TESTBIT 0x80 + + /* Interrupt Controller 0 */ #define IC0_CFG0RD 0xB0400040 #define IC0_CFG0SET 0xB0400040 diff --git a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h index 8c6b110..c8a553a3 100644 --- a/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h +++ b/arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h @@ -358,10 +358,6 @@ u32 au1xxx_dbdma_put_dscr(u32 chanid, au1x_ddma_desc_t *dscr); u32 au1xxx_ddma_add_device(dbdev_tab_t *dev); extern void au1xxx_ddma_del_device(u32 devid); void *au1xxx_ddma_get_nextptr_virt(au1x_ddma_desc_t *dp); -#ifdef CONFIG_PM -void au1xxx_dbdma_suspend(void); -void au1xxx_dbdma_resume(void); -#endif /* * Flags for the put_source/put_dest functions. diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h index 43d4da0..3999ec0 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h @@ -20,7 +20,7 @@ static inline unsigned long bcm63xx_gpio_count(void) } } -#define GPIO_DIR_OUT 0x0 -#define GPIO_DIR_IN 0x1 +#define BCM63XX_GPIO_DIR_OUT 0x0 +#define BCM63XX_GPIO_DIR_IN 0x1 #endif /* !BCM63XX_GPIO_H */ diff --git a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 16210ce..675bd86 100644 --- a/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -52,6 +52,8 @@ #define cpu_has_tx39_cache 0 #define cpu_has_userlocal 0 #define cpu_has_vce 0 +#define cpu_has_veic 0 +#define cpu_has_vint 0 #define cpu_has_vtag_icache 0 #define cpu_has_watch 1 diff --git a/arch/mips/include/asm/mach-loongson/gpio.h b/arch/mips/include/asm/mach-loongson/gpio.h new file mode 100644 index 0000000..e30e73d --- /dev/null +++ b/arch/mips/include/asm/mach-loongson/gpio.h @@ -0,0 +1,35 @@ +/* + * STLS2F GPIO Support + * + * Copyright (c) 2008 Richard Liu, STMicroelectronics <richard.liu@st.com> + * Copyright (c) 2008-2010 Arnaud Patard <apatard@mandriva.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __STLS2F_GPIO_H +#define __STLS2F_GPIO_H + +#include <asm-generic/gpio.h> + +extern void gpio_set_value(unsigned gpio, int value); +extern int gpio_get_value(unsigned gpio); +extern int gpio_cansleep(unsigned gpio); + +/* The chip can do interrupt + * but it has not been tested and doc not clear + */ +static inline int gpio_to_irq(int gpio) +{ + return -EINVAL; +} + +static inline int irq_to_gpio(int gpio) +{ + return -EINVAL; +} + +#endif /* __STLS2F_GPIO_H */ diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h index ab38791..5d33b72 100644 --- a/arch/mips/include/asm/processor.h +++ b/arch/mips/include/asm/processor.h @@ -344,16 +344,10 @@ unsigned long get_wchan(struct task_struct *p); #ifdef CONFIG_CPU_HAS_PREFETCH #define ARCH_HAS_PREFETCH +#define prefetch(x) __builtin_prefetch((x), 0, 1) -static inline void prefetch(const void *addr) -{ - __asm__ __volatile__( - " .set mips4 \n" - " pref %0, (%1) \n" - " .set mips0 \n" - : - : "i" (Pref_Load), "r" (addr)); -} +#define ARCH_HAS_PREFETCHW +#define prefetchw(x) __builtin_prefetch((x), 1, 1) #endif |