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authorPaul Burton <paul.burton@imgtec.com>2014-03-05 11:35:53 +0000
committerPaul Burton <paul.burton@imgtec.com>2014-05-02 16:39:11 +0100
commit414408d0eedd782a397ba89fd8f732ffbd3acde8 (patch)
treea747abf36d79d04d5a916a4e6fc230ccdf1776e7 /arch/mips/include
parent0467811e9bdb22c7a1595db4c230efd99265e3c7 (diff)
downloadop-kernel-dev-414408d0eedd782a397ba89fd8f732ffbd3acde8.zip
op-kernel-dev-414408d0eedd782a397ba89fd8f732ffbd3acde8.tar.gz
MIPS: allow GIC clockevent device config from other CPUs
This patch allows the GIC clockevent device for a CPU to be configured by another CPU. This makes GIC clockevent devices suitable for use as the tick broadcast device, where formerly the GIC timer local to the configuring CPU would have been configured incorrectly. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/gic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 0827166..10f6a99 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -380,6 +380,7 @@ extern unsigned int gic_compare_int (void);
extern cycle_t gic_read_count(void);
extern cycle_t gic_read_compare(void);
extern void gic_write_compare(cycle_t cnt);
+extern void gic_write_cpu_compare(cycle_t cnt, int cpu);
extern void gic_send_ipi(unsigned int intr);
extern unsigned int plat_ipi_call_int_xlate(unsigned int);
extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
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