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author | Paul Burton <paul.burton@imgtec.com> | 2014-02-14 09:21:30 +0000 |
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committer | Paul Burton <paul.burton@imgtec.com> | 2014-05-02 16:39:10 +0100 |
commit | 0467811e9bdb22c7a1595db4c230efd99265e3c7 (patch) | |
tree | d9546ca9126c6bf78895843bbaf787a576d3c3e8 /arch/mips/include | |
parent | 74e91335190c628b870c69cff8360d23707b1f53 (diff) | |
download | op-kernel-dev-0467811e9bdb22c7a1595db4c230efd99265e3c7.zip op-kernel-dev-0467811e9bdb22c7a1595db4c230efd99265e3c7.tar.gz |
MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOP
Although the GIC counter will continue when a core is in a low power
state and it will still trigger interrupts, the core will be incapable
of servicing those interrupts rendering them useless.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/include')
0 files changed, 0 insertions, 0 deletions