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authorRalf Baechle <ralf@linux-mips.org>2008-10-28 17:38:42 +0000
committerRalf Baechle <ralf@linux-mips.org>2008-10-30 14:44:34 +0000
commitba3049ed4086737dab200b6087138a4b8e06915d (patch)
tree78a665064e6cc288bb34ef20cd543c2feb204838 /arch/mips/include
parent076c6e4f4d81113615f50e5bc2c569f628bcd54a (diff)
downloadop-kernel-dev-ba3049ed4086737dab200b6087138a4b8e06915d.zip
op-kernel-dev-ba3049ed4086737dab200b6087138a4b8e06915d.tar.gz
MIPS: Switch FPU emulator trap to BREAK instruction.
Arguably using the address error handler has always been ugly. But with processors that handle unaligned loads and stores in hardware the current mechanism ceases to work so switch it to a BREAK instruction and allocate break code 514 to the FPU emulator. Yoichi Yuasa provided a build fix for CONFIG_BUG=n. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/break.h1
-rw-r--r--arch/mips/include/asm/fpu_emulator.h17
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/mips/include/asm/break.h b/arch/mips/include/asm/break.h
index 25b980c..44437ed 100644
--- a/arch/mips/include/asm/break.h
+++ b/arch/mips/include/asm/break.h
@@ -29,6 +29,7 @@
#define _BRK_THREADBP 11 /* For threads, user bp (used by debuggers) */
#define BRK_BUG 512 /* Used by BUG() */
#define BRK_KDB 513 /* Used in KDB_ENTER() */
+#define BRK_MEMU 514 /* Used by FPU emulator */
#define BRK_MULOVF 1023 /* Multiply overflow */
#endif /* __ASM_BREAK_H */
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h
index 2731c38..e518957 100644
--- a/arch/mips/include/asm/fpu_emulator.h
+++ b/arch/mips/include/asm/fpu_emulator.h
@@ -23,6 +23,9 @@
#ifndef _ASM_FPU_EMULATOR_H
#define _ASM_FPU_EMULATOR_H
+#include <asm/break.h>
+#include <asm/inst.h>
+
struct mips_fpu_emulator_stats {
unsigned int emulated;
unsigned int loads;
@@ -34,4 +37,18 @@ struct mips_fpu_emulator_stats {
extern struct mips_fpu_emulator_stats fpuemustats;
+extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
+ unsigned long cpc);
+extern int do_dsemulret(struct pt_regs *xcp);
+
+/*
+ * Instruction inserted following the badinst to further tag the sequence
+ */
+#define BD_COOKIE 0x0000bd36 /* tne $0, $0 with baggage */
+
+/*
+ * Break instruction with special math emu break code set
+ */
+#define BREAK_MATH (0x0000000d | (BRK_MEMU << 16))
+
#endif /* _ASM_FPU_EMULATOR_H */
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