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authorDavid Daney <david.daney@cavium.com>2014-05-28 23:52:09 +0200
committerRalf Baechle <ralf@linux-mips.org>2014-05-30 21:01:10 +0200
commit18a8cd63c0d800bbc8b91f03054fcb13d308f6ec (patch)
tree0b63b2e2c0d7b373372ab277557b2d87198ed429 /arch/mips/include/asm
parent35d0470668cca234e49ed35342b3f9a0eec8355c (diff)
downloadop-kernel-dev-18a8cd63c0d800bbc8b91f03054fcb13d308f6ec.zip
op-kernel-dev-18a8cd63c0d800bbc8b91f03054fcb13d308f6ec.tar.gz
MIPS: Add minimal support for OCTEON3 to c-r4k.c
These are needed to boot a generic mips64r2 kernel on OCTEONIII. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: James Hogan <james.hogan@imgtec.com> Cc: kvm@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7003/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
-rw-r--r--arch/mips/include/asm/r4kcache.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index fe8d1b6..0b8bd28 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -523,6 +523,8 @@ __BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32,
__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, )
__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, )
__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 128, )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 128, )
__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, )
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