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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-10-15 11:31:54 +1100 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2008-10-15 11:31:54 +1100 |
commit | 6dc6472581f693b5fc95aebedf67b4960fb85cf0 (patch) | |
tree | 06a5a9a08519950575505273eabced331ed51405 /arch/mips/include/asm/tlb.h | |
parent | ee673eaa72d8d185012b1027a05e25aba18c267f (diff) | |
parent | 8acd3a60bcca17c6d89c73cee3ad6057eb83ba1e (diff) | |
download | op-kernel-dev-6dc6472581f693b5fc95aebedf67b4960fb85cf0.zip op-kernel-dev-6dc6472581f693b5fc95aebedf67b4960fb85cf0.tar.gz |
Merge commit 'origin'
Manual fixup of conflicts on:
arch/powerpc/include/asm/dcr-regs.h
drivers/net/ibm_newemac/core.h
Diffstat (limited to 'arch/mips/include/asm/tlb.h')
-rw-r--r-- | arch/mips/include/asm/tlb.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/include/asm/tlb.h b/arch/mips/include/asm/tlb.h new file mode 100644 index 0000000..80d9dfc --- /dev/null +++ b/arch/mips/include/asm/tlb.h @@ -0,0 +1,23 @@ +#ifndef __ASM_TLB_H +#define __ASM_TLB_H + +/* + * MIPS doesn't need any special per-pte or per-vma handling, except + * we need to flush cache for area to be unmapped. + */ +#define tlb_start_vma(tlb, vma) \ + do { \ + if (!tlb->fullmm) \ + flush_cache_range(vma, vma->vm_start, vma->vm_end); \ + } while (0) +#define tlb_end_vma(tlb, vma) do { } while (0) +#define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) + +/* + * .. because we flush the whole mm when it fills up. + */ +#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) + +#include <asm-generic/tlb.h> + +#endif /* __ASM_TLB_H */ |