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| author | James Morris <jmorris@namei.org> | 2009-03-24 10:52:46 +1100 |
|---|---|---|
| committer | James Morris <jmorris@namei.org> | 2009-03-24 10:52:46 +1100 |
| commit | 703a3cd72817e99201cef84a8a7aecc60b2b3581 (patch) | |
| tree | 3e943755178ff410694722bb031f523136fbc432 /arch/mips/include/asm/prefetch.h | |
| parent | df7f54c012b92ec93d56b68547351dcdf8a163d3 (diff) | |
| parent | 8e0ee43bc2c3e19db56a4adaa9a9b04ce885cd84 (diff) | |
| download | op-kernel-dev-703a3cd72817e99201cef84a8a7aecc60b2b3581.zip op-kernel-dev-703a3cd72817e99201cef84a8a7aecc60b2b3581.tar.gz | |
Merge branch 'master' into next
Diffstat (limited to 'arch/mips/include/asm/prefetch.h')
| -rw-r--r-- | arch/mips/include/asm/prefetch.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/prefetch.h b/arch/mips/include/asm/prefetch.h index 1785083..a56594f 100644 --- a/arch/mips/include/asm/prefetch.h +++ b/arch/mips/include/asm/prefetch.h @@ -26,7 +26,7 @@ * Pref_WriteBackInvalidate is a nop and Pref_PrepareForStore is broken in * current versions due to erratum G105. * - * VR7701 only implements the Load prefetch. + * VR5500 (including VR5701 and VR7701) only implement load prefetch. * * Finally MIPS32 and MIPS64 implement all of the following hints. */ |
