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author | Ralf Baechle <ralf@linux-mips.org> | 2008-09-16 19:48:51 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2008-10-11 16:18:52 +0100 |
commit | 384740dc49ea651ba350704d13ff6be9976e37fe (patch) | |
tree | a6e80cad287ccae7a86d81bfa692fc96889c88ed /arch/mips/include/asm/mach-lasat | |
parent | e8c7c482347574ecdd45c43e32c332d5fc2ece61 (diff) | |
download | op-kernel-dev-384740dc49ea651ba350704d13ff6be9976e37fe.zip op-kernel-dev-384740dc49ea651ba350704d13ff6be9976e37fe.tar.gz |
MIPS: Move headfiles to new location below arch/mips/include
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-lasat')
-rw-r--r-- | arch/mips/include/asm/mach-lasat/irq.h | 13 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-lasat/mach-gt64120.h | 27 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-lasat/war.h | 25 |
3 files changed, 65 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-lasat/irq.h b/arch/mips/include/asm/mach-lasat/irq.h new file mode 100644 index 0000000..3a28241 --- /dev/null +++ b/arch/mips/include/asm/mach-lasat/irq.h @@ -0,0 +1,13 @@ +#ifndef _ASM_MACH_LASAT_IRQ_H +#define _ASM_MACH_LASAT_IRQ_H + +#define LASAT_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 2) + +#define LASAT_IRQ_BASE 8 +#define LASAT_IRQ_END 23 + +#define NR_IRQS 24 + +#include_next <irq.h> + +#endif /* _ASM_MACH_LASAT_IRQ_H */ diff --git a/arch/mips/include/asm/mach-lasat/mach-gt64120.h b/arch/mips/include/asm/mach-lasat/mach-gt64120.h new file mode 100644 index 0000000..1a9ad45 --- /dev/null +++ b/arch/mips/include/asm/mach-lasat/mach-gt64120.h @@ -0,0 +1,27 @@ +/* + * This is a direct copy of the ev96100.h file, with a global + * search and replace. The numbers are the same. + * + * The reason I'm duplicating this is so that the 64120/96100 + * defines won't be confusing in the source code. + */ +#ifndef _ASM_GT64120_LASAT_GT64120_DEP_H +#define _ASM_GT64120_LASAT_GT64120_DEP_H + +/* + * GT64120 config space base address on Lasat 100 + */ +#define GT64120_BASE (KSEG1ADDR(0x14000000)) + +/* + * PCI Bus allocation + * + * (Guessing ...) + */ +#define GT_PCI_MEM_BASE 0x12000000UL +#define GT_PCI_MEM_SIZE 0x02000000UL +#define GT_PCI_IO_BASE 0x10000000UL +#define GT_PCI_IO_SIZE 0x02000000UL +#define GT_ISA_IO_BASE PCI_IO_BASE + +#endif /* _ASM_GT64120_LASAT_GT64120_DEP_H */ diff --git a/arch/mips/include/asm/mach-lasat/war.h b/arch/mips/include/asm/mach-lasat/war.h new file mode 100644 index 0000000..bb1e032 --- /dev/null +++ b/arch/mips/include/asm/mach-lasat/war.h @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __ASM_MIPS_MACH_LASAT_WAR_H +#define __ASM_MIPS_MACH_LASAT_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#define R10000_LLSC_WAR 0 +#define MIPS34K_MISSED_ITLB_WAR 0 + +#endif /* __ASM_MIPS_MACH_LASAT_WAR_H */ |