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| author | Ralf Baechle <ralf@linux-mips.org> | 2009-12-17 01:57:35 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-12-17 01:57:35 +0000 |
| commit | de4148f3ef54b644a181ad75a6fb4b373f2b01f0 (patch) | |
| tree | 83aa287fbbcc14a3df9e161af99af49776b61b6f /arch/mips/include/asm/mach-excite/war.h | |
| parent | c3d8d85019c9e4f6e4f23d194b6432a2c2464372 (diff) | |
| download | op-kernel-dev-de4148f3ef54b644a181ad75a6fb4b373f2b01f0.zip op-kernel-dev-de4148f3ef54b644a181ad75a6fb4b373f2b01f0.tar.gz | |
MIPS: eXcite: Remove platform.
The platform has never been fully merged
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Thomas Koeller <thomas.koeller@baslerweb.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Wim Van Sebroeck <wim@iguana.be>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mtd@lists.infradead.org
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'arch/mips/include/asm/mach-excite/war.h')
| -rw-r--r-- | arch/mips/include/asm/mach-excite/war.h | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/arch/mips/include/asm/mach-excite/war.h b/arch/mips/include/asm/mach-excite/war.h deleted file mode 100644 index 1f82180..0000000 --- a/arch/mips/include/asm/mach-excite/war.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> - */ -#ifndef __ASM_MIPS_MACH_EXCITE_WAR_H -#define __ASM_MIPS_MACH_EXCITE_WAR_H - -#define R4600_V1_INDEX_ICACHEOP_WAR 0 -#define R4600_V1_HIT_CACHEOP_WAR 0 -#define R4600_V2_HIT_CACHEOP_WAR 0 -#define R5432_CP0_INTERRUPT_WAR 0 -#define BCM1250_M3_WAR 0 -#define SIBYTE_1956_WAR 0 -#define MIPS4K_ICACHE_REFILL_WAR 0 -#define MIPS_CACHE_SYNC_WAR 0 -#define TX49XX_ICACHE_INDEX_INV_WAR 0 -#define RM9000_CDEX_SMP_WAR 1 -#define ICACHE_REFILLS_WORKAROUND_WAR 1 -#define R10000_LLSC_WAR 0 -#define MIPS34K_MISSED_ITLB_WAR 0 - -#endif /* __ASM_MIPS_MACH_EXCITE_WAR_H */ |
