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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2006-11-14 01:13:18 +0900
committerRalf Baechle <ralf@linux-mips.org>2006-11-30 01:14:46 +0000
commit1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067 (patch)
tree0274893cb78ca2e1bb85c3eee0c07a85e0b83d04 /arch/mips/emma2rh
parent1603b5aca4f15b34848fb5594d0c7b6333b99144 (diff)
downloadop-kernel-dev-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.zip
op-kernel-dev-1417836e81c0ab8f5a0bfeafa90d3eaa41b2a067.tar.gz
[MIPS] use generic_handle_irq, handle_level_irq, handle_percpu_irq
Further incorporation of generic irq framework. Replacing __do_IRQ() by proper flow handler would make the irq handling path a bit simpler and faster. * use generic_handle_irq() instead of __do_IRQ(). * use handle_level_irq for obvious level-type irq chips. * use handle_percpu_irq for irqs marked as IRQ_PER_CPU. * setup .eoi routine for irq chips possibly used with handle_percpu_irq. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/emma2rh')
-rw-r--r--arch/mips/emma2rh/common/irq_emma2rh.c3
-rw-r--r--arch/mips/emma2rh/markeins/irq_markeins.c3
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
index bf1b83b..59b9829 100644
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -76,7 +76,8 @@ void emma2rh_irq_init(u32 irq_base)
u32 i;
for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ; i++)
- set_irq_chip(i, &emma2rh_irq_controller);
+ set_irq_chip_and_handler(i, &emma2rh_irq_controller,
+ handle_level_irq);
emma2rh_irq_base = irq_base;
}
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
index 8e5f08a..3ac4e40 100644
--- a/arch/mips/emma2rh/markeins/irq_markeins.c
+++ b/arch/mips/emma2rh/markeins/irq_markeins.c
@@ -68,7 +68,8 @@ void emma2rh_sw_irq_init(u32 irq_base)
u32 i;
for (i = irq_base; i < irq_base + NUM_EMMA2RH_IRQ_SW; i++)
- set_irq_chip(i, &emma2rh_sw_irq_controller);
+ set_irq_chip_and_handler(i, &emma2rh_sw_irq_controller,
+ handle_level_irq);
emma2rh_sw_irq_base = irq_base;
}
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