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author | Aaro Koskinen <aaro.koskinen@iki.fi> | 2013-07-25 20:26:48 +0300 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2013-08-26 15:31:54 +0200 |
commit | d8b74276f5488d64ebb28d77631b536f1c5de6d2 (patch) | |
tree | 14d0ab528fbb73443ae94b9ab84700c78936c067 /arch/mips/cavium-octeon | |
parent | 83eefabf9b596b8237cdcc385bff67f70d1e5a2d (diff) | |
download | op-kernel-dev-d8b74276f5488d64ebb28d77631b536f1c5de6d2.zip op-kernel-dev-d8b74276f5488d64ebb28d77631b536f1c5de6d2.tar.gz |
MIPS: cavium-octeon: fix I/O space setup on non-PCI systems
Fix I/O space setup, so that on non-PCI systems using inb()/outb()
won't crash the system. Some drivers may try to probe I/O space and for
that purpose we can just allocate some normal memory initially. Drivers
trying to reserve a region will fail early as we set the size to 0. If
a real I/O space is present, the PCI/PCIe support code will re-adjust
the values accordingly.
Tested with EdgeRouter Lite by enabling CONFIG_SERIO_I8042 that caused
the originally reported crash.
Reported-by: Faidon Liambotis <paravoid@debian.org>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5626/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r-- | arch/mips/cavium-octeon/setup.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 48b08eb..b212ae1 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -8,6 +8,7 @@ * written by Ralf Baechle <ralf@linux-mips.org> */ #include <linux/compiler.h> +#include <linux/vmalloc.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/console.h> @@ -1139,3 +1140,30 @@ static int __init edac_devinit(void) return err; } device_initcall(edac_devinit); + +static void __initdata *octeon_dummy_iospace; + +static int __init octeon_no_pci_init(void) +{ + /* + * Initially assume there is no PCI. The PCI/PCIe platform code will + * later re-initialize these to correct values if they are present. + */ + octeon_dummy_iospace = vzalloc(IO_SPACE_LIMIT); + set_io_port_base((unsigned long)octeon_dummy_iospace); + ioport_resource.start = MAX_RESOURCE; + ioport_resource.end = 0; + return 0; +} +core_initcall(octeon_no_pci_init); + +static int __init octeon_no_pci_release(void) +{ + /* + * Release the allocated memory if a real IO space is there. + */ + if ((unsigned long)octeon_dummy_iospace != mips_io_port_base) + vfree(octeon_dummy_iospace); + return 0; +} +late_initcall(octeon_no_pci_release); |