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authorLinus Torvalds <torvalds@linux-foundation.org>2014-10-07 21:16:26 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2014-10-07 21:16:26 -0400
commit28596c9722289b2f98fa83a2e4351eb0a031b953 (patch)
treef1a76a8a2604ac710bad28e3ad1b5976601c82d4 /arch/mips/cavium-octeon
parentb6420ebd4a541455a75f9802f58cfa3ba0ea5390 (diff)
parent7bb38d57fd75f03753a5b362916c5bbde8290208 (diff)
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op-kernel-dev-28596c9722289b2f98fa83a2e4351eb0a031b953.tar.gz
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
Pull "trivial tree" updates from Jiri Kosina: "Usual pile from trivial tree everyone is so eagerly waiting for" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits) Remove MN10300_PROC_MN2WS0038 mei: fix comments treewide: Fix typos in Kconfig kprobes: update jprobe_example.c for do_fork() change Documentation: change "&" to "and" in Documentation/applying-patches.txt Documentation: remove obsolete pcmcia-cs from Changes Documentation: update links in Changes Documentation: Docbook: Fix generated DocBook/kernel-api.xml score: Remove GENERIC_HAS_IOMAP gpio: fix 'CONFIG_GPIO_IRQCHIP' comments tty: doc: Fix grammar in serial/tty dma-debug: modify check_for_stack output treewide: fix errors in printk genirq: fix reference in devm_request_threaded_irq comment treewide: fix synchronize_rcu() in comments checkstack.pl: port to AArch64 doc: queue-sysfs: minor fixes init/do_mounts: better syntax description MIPS: fix comment spelling powerpc/simpleboot: fix comment ...
Diffstat (limited to 'arch/mips/cavium-octeon')
-rw-r--r--arch/mips/cavium-octeon/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index 6028666..c370426 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -1,7 +1,7 @@
if CPU_CAVIUM_OCTEON
config CAVIUM_CN63XXP1
- bool "Enable CN63XXP1 errata worarounds"
+ bool "Enable CN63XXP1 errata workarounds"
default "n"
help
The CN63XXP1 chip requires build time workarounds to
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