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author | Paul Burton <paul.burton@imgtec.com> | 2016-08-26 15:17:35 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2016-10-05 01:31:20 +0200 |
commit | c11e3b48dbc367e38dfaea6e8a61d3b39f476685 (patch) | |
tree | 206ec739e07875e5cb77a71fe2fed8b9a7cbcba9 /arch/mips/boot | |
parent | b6d5e47e67292542a41c3fe367bacb364eb4e601 (diff) | |
download | op-kernel-dev-c11e3b48dbc367e38dfaea6e8a61d3b39f476685.zip op-kernel-dev-c11e3b48dbc367e38dfaea6e8a61d3b39f476685.tar.gz |
MIPS: SEAD3: Probe UARTs using DT
Probe the UARTs on SEAD3 boards using device tree rather than platform
code, in order to reduce the amount of the latter. This requires that
CONFIG_SERIAL_OF_PLATFORM be enabled, so enable it in sead3_defconfig.
The SEAD3 DT shim code is extended to read bootloader environment
variables to determine the appropriate UART & mode for kernel console
output & set the stdout-path property of the chosen node accordingly.
In contrast to the old platform code, which appears to have only ever
set "console=ttyS0,38400n8r" with the code in console_config never
having an effect, this will honor the "yamontty" environment variable to
select between the 2 UARTs on the board and then check the "modetty0" or
"modetty1" variable as appropriate to determine the UART configuration.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14048/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r-- | arch/mips/boot/dts/mti/sead3.dts | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts index 051b3a9..3f681c5 100644 --- a/arch/mips/boot/dts/mti/sead3.dts +++ b/arch/mips/boot/dts/mti/sead3.dts @@ -12,6 +12,15 @@ compatible = "mti,sead-3"; interrupt-parent = <&gic>; + chosen { + stdout-path = "uart1:115200"; + }; + + aliases { + uart0 = &uart0; + uart1 = &uart1; + }; + cpus { cpu@0 { compatible = "mti,mips14KEc", "mti,mips14Kc"; @@ -50,4 +59,32 @@ interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; }; }; + + /* UART connected to FTDI & miniUSB socket */ + uart0: uart@1f000900 { + compatible = "ns16550a"; + reg = <0x1f000900 0x20>; + reg-io-width = <4>; + reg-shift = <2>; + + clock-frequency = <14745600>; + + interrupts = <3>; /* GIC 3 or CPU 4 */ + + no-loopback-test; + }; + + /* UART connected to RS232 socket */ + uart1: uart@1f000800 { + compatible = "ns16550a"; + reg = <0x1f000800 0x20>; + reg-io-width = <4>; + reg-shift = <2>; + + clock-frequency = <14745600>; + + interrupts = <2>; /* GIC 2 or CPU 4 */ + + no-loopback-test; + }; }; |