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authorKevin Cernekee <cernekee@gmail.com>2013-06-03 14:39:34 +0000
committerRalf Baechle <ralf@linux-mips.org>2013-07-01 15:10:52 +0200
commit937ad1042572bb3641fcbbc477f5c6b137b3a5e0 (patch)
tree1499acaddb73aee85c8904bbb7a131518f251bf9 /arch/mips/bcm63xx/irq.c
parent1400eb656760d14274ed08e45824ccbcc366585b (diff)
downloadop-kernel-dev-937ad1042572bb3641fcbbc477f5c6b137b3a5e0.zip
op-kernel-dev-937ad1042572bb3641fcbbc477f5c6b137b3a5e0.tar.gz
MIPS: BCM63XX: Handle SW IRQs 0-1
MIPS software IRQs 0 and 1 are used for interprocessor signaling (IPI) on BMIPS SMP. Make the board support code aware of them. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> [jogo@openwrt.org: move sw irqs behind timer irq] Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm63xx/irq.c')
-rw-r--r--arch/mips/bcm63xx/irq.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index c0ab388..d744606 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -294,6 +294,10 @@ asmlinkage void plat_irq_dispatch(void)
if (cause & CAUSEF_IP7)
do_IRQ(7);
+ if (cause & CAUSEF_IP0)
+ do_IRQ(0);
+ if (cause & CAUSEF_IP1)
+ do_IRQ(1);
if (cause & CAUSEF_IP2)
dispatch_internal();
if (!is_ext_irq_cascaded) {
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