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author | James Hogan <james.hogan@imgtec.com> | 2015-02-06 23:01:00 +0000 |
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committer | James Hogan <james.hogan@imgtec.com> | 2015-03-27 21:25:19 +0000 |
commit | 2b6009d646887cac8888f1ce8694af0beefce88b (patch) | |
tree | f19289e342e1c42959dfa51ca7b6b278550dad89 /arch/mips/bcm47xx | |
parent | 539cb89fbdfe082d00be6f83d0f2140b7802151c (diff) | |
download | op-kernel-dev-2b6009d646887cac8888f1ce8694af0beefce88b.zip op-kernel-dev-2b6009d646887cac8888f1ce8694af0beefce88b.tar.gz |
MIPS: KVM: Emulate MSA bits in COP0 interface
Emulate MSA related parts of COP0 interface so that the guest will be
able to enable/disable MSA (Config5.MSAEn) once the MSA capability has
been wired up.
As with the FPU (Status.CU1) setting Config5.MSAEn has no immediate
effect if the MSA state isn't live, as MSA state is restored lazily on
first use. Changes after the MSA state has been restored take immediate
effect, so that the guest can start getting MSA disabled exceptions
right away for guest MSA operations. The MSA state is saved lazily too,
as MSA may get re-enabled in the near future anyway.
A special case is also added for when Status.CU1 is set while FR=0 and
the MSA state is live. In this case we are at risk of getting reserved
instruction exceptions if we try and save the MSA state, so we lose the
MSA state sooner while MSA is still usable.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Gleb Natapov <gleb@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Diffstat (limited to 'arch/mips/bcm47xx')
0 files changed, 0 insertions, 0 deletions