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authorGabor Juhos <juhosg@openwrt.org>2011-11-18 00:17:46 +0000
committerRalf Baechle <ralf@linux-mips.org>2011-12-07 22:02:47 +0000
commitbe5f3623204e15cb8a95a6d381ae6eb074ba46b5 (patch)
tree52fb613a75ad0c563323de0ddcb646d595196d1b /arch/mips/ath79
parent2dc7b4a1977e3bd3b7c819c63cab1baf7d260d89 (diff)
downloadop-kernel-dev-be5f3623204e15cb8a95a6d381ae6eb074ba46b5.zip
op-kernel-dev-be5f3623204e15cb8a95a6d381ae6eb074ba46b5.tar.gz
MIPS: ath79: Store the SoC revision in a global variable
Knowing the exact revision of the SoC is required to make runtime decisions in various code paths. We have determined the SoC revision already, so we only need to store that in a global variable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3027/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath79')
-rw-r--r--arch/mips/ath79/common.c1
-rw-r--r--arch/mips/ath79/setup.c2
2 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c
index 38c2ad7..f0fda98 100644
--- a/arch/mips/ath79/common.c
+++ b/arch/mips/ath79/common.c
@@ -30,6 +30,7 @@ u32 ath79_ddr_freq;
EXPORT_SYMBOL_GPL(ath79_ddr_freq);
enum ath79_soc_type ath79_soc;
+unsigned int ath79_soc_rev;
void __iomem *ath79_pll_base;
void __iomem *ath79_reset_base;
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index 4187a11..61bf339 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -149,6 +149,8 @@ static void __init ath79_detect_sys_type(void)
panic("ath79: unknown SoC, id:0x%08x\n", id);
}
+ ath79_soc_rev = rev;
+
sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
pr_info("SoC: %s\n", ath79_sys_type);
}
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