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authorDavid Daney <david.daney@cavium.com>2011-09-24 02:29:55 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-10-24 23:34:26 +0100
commit82091564cfd7ab8def42777a9c662dbf655c5d25 (patch)
tree2e0328b9795a694aa64561958f397770610fab2b /arch/mips/Kconfig
parente5dcb58aa51090f462959b9789eb477286bd2279 (diff)
downloadop-kernel-dev-82091564cfd7ab8def42777a9c662dbf655c5d25.zip
op-kernel-dev-82091564cfd7ab8def42777a9c662dbf655c5d25.tar.gz
MIPS: perf: Add support for 64-bit perf counters.
The hard coded constants are moved to struct mips_pmu. All counter register access move to the read_counter and write_counter function pointers, which are set to either 32-bit or 64-bit access methods at initialization time. Many of the function pointers in struct mips_pmu were not needed as there was only a single implementation, these were removed. I couldn't figure out what made struct cpu_hw_events.msbs[] at all useful, so I removed it too. Some functions and other declarations were reordered to reduce the need for forward declarations. Signed-off-by: David Daney <david.daney@cavium.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2792/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
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