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| author | Michal Simek <monstr@monstr.eu> | 2010-03-15 08:48:27 +0100 |
|---|---|---|
| committer | Michal Simek <monstr@monstr.eu> | 2010-04-01 08:38:23 +0200 |
| commit | ee68f1745e7734a55c8bf680f6f464205f1f15da (patch) | |
| tree | 25fb85eb407389adf81419c045415882090bb1f1 /arch/microblaze | |
| parent | 89ae9753aef160c2f7bcecec21a7c4a6bc4c9b9b (diff) | |
| download | op-kernel-dev-ee68f1745e7734a55c8bf680f6f464205f1f15da.zip op-kernel-dev-ee68f1745e7734a55c8bf680f6f464205f1f15da.tar.gz | |
microblaze: Support systems without lmb bram
When the system has no lmb bram, main memory should be start from
zero because of microblaze vectors.
DTS fragment could look like:
DDR2_SDRAM: memory@0 {
device_type = "memory";
reg = < 0x0 0x10000000 >;
} ;
Then you have to setup CONFIG_KERNEL_BASE_ADDR=0 which caused
that kernel physical start address will be zero. On reset vector place
will be jump to 0x100 and on 0x100 starts kernel text.
You have to solve how to load the kernel before cpu starts.
Tested with XMD.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze')
| -rw-r--r-- | arch/microblaze/kernel/head.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S index cb7815c..e397d5d 100644 --- a/arch/microblaze/kernel/head.S +++ b/arch/microblaze/kernel/head.S @@ -51,6 +51,12 @@ swapper_pg_dir: .text ENTRY(_start) +#if CONFIG_KERNEL_BASE_ADDR == 0 + brai TOPHYS(real_start) + .org 0x100 +real_start: +#endif + mfs r1, rmsr andi r1, r1, ~2 mts rmsr, r1 |
