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authorMichal Simek <monstr@monstr.eu>2011-02-07 18:51:54 +0100
committerMichal Simek <monstr@monstr.eu>2011-02-07 19:12:30 +0100
commit1f80a67da2da4180355bc36b2691f16684b194fd (patch)
tree52e9273e5dcc77db79a27e40fa94247b95c4bbe8 /arch/microblaze
parent1649700408531ec64ae33af55a1091db50d1f7da (diff)
downloadop-kernel-dev-1f80a67da2da4180355bc36b2691f16684b194fd.zip
op-kernel-dev-1f80a67da2da4180355bc36b2691f16684b194fd.tar.gz
microblaze: Fix pte_update function
Do not disable irq in asm but use irq macros. Systems with MSR=0 couldn't use pte_update function because msrclr was hardcoded. Signed-off-by: Michal Simek <monstr@monstr.eu>
Diffstat (limited to 'arch/microblaze')
-rw-r--r--arch/microblaze/include/asm/pgtable.h27
1 files changed, 13 insertions, 14 deletions
diff --git a/arch/microblaze/include/asm/pgtable.h b/arch/microblaze/include/asm/pgtable.h
index b23f680..885574a 100644
--- a/arch/microblaze/include/asm/pgtable.h
+++ b/arch/microblaze/include/asm/pgtable.h
@@ -411,20 +411,19 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
static inline unsigned long pte_update(pte_t *p, unsigned long clr,
unsigned long set)
{
- unsigned long old, tmp, msr;
-
- __asm__ __volatile__("\
- msrclr %2, 0x2\n\
- nop\n\
- lw %0, %4, r0\n\
- andn %1, %0, %5\n\
- or %1, %1, %6\n\
- sw %1, %4, r0\n\
- mts rmsr, %2\n\
- nop"
- : "=&r" (old), "=&r" (tmp), "=&r" (msr), "=m" (*p)
- : "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set), "m" (*p)
- : "cc");
+ unsigned long flags, old, tmp;
+
+ raw_local_irq_save(flags);
+
+ __asm__ __volatile__( "lw %0, %2, r0 \n"
+ "andn %1, %0, %3 \n"
+ "or %1, %1, %4 \n"
+ "sw %1, %2, r0 \n"
+ : "=&r" (old), "=&r" (tmp)
+ : "r" ((unsigned long)(p + 1) - 4), "r" (clr), "r" (set)
+ : "cc");
+
+ raw_local_irq_restore(flags);
return old;
}
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