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author | Ingo Molnar <mingo@elte.hu> | 2009-04-29 14:46:59 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-04-29 14:47:05 +0200 |
commit | e7fd5d4b3d240f42c30a9e3d20a4689c4d3a795a (patch) | |
tree | 4ba588631dd8189a818a91c9e3976526071178b6 /arch/microblaze/include/asm/cpuinfo.h | |
parent | 1130b0296184bc21806225fd06d533515a99d2db (diff) | |
parent | 56a50adda49b2020156616c4eb15353e0f9ad7de (diff) | |
download | op-kernel-dev-e7fd5d4b3d240f42c30a9e3d20a4689c4d3a795a.zip op-kernel-dev-e7fd5d4b3d240f42c30a9e3d20a4689c4d3a795a.tar.gz |
Merge branch 'linus' into perfcounters/core
Merge reason: This brach was on -rc1, refresh it to almost-rc4 to pick up
the latest upstream fixes.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/microblaze/include/asm/cpuinfo.h')
-rw-r--r-- | arch/microblaze/include/asm/cpuinfo.h | 102 |
1 files changed, 102 insertions, 0 deletions
diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h new file mode 100644 index 0000000..52f28f6 --- /dev/null +++ b/arch/microblaze/include/asm/cpuinfo.h @@ -0,0 +1,102 @@ +/* + * Generic support for queying CPU info + * + * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> + * Copyright (C) 2007-2009 PetaLogix + * Copyright (C) 2007 John Williams <jwilliams@itee.uq.edu.au> + * + * This file is subject to the terms and conditions of the GNU General + * Public License. See the file COPYING in the main directory of this + * archive for more details. + */ + +#ifndef _ASM_MICROBLAZE_CPUINFO_H +#define _ASM_MICROBLAZE_CPUINFO_H + +#include <asm/prom.h> + +/* CPU Version and FPGA Family code conversion table type */ +struct cpu_ver_key { + const char *s; + const unsigned k; +}; + +extern const struct cpu_ver_key cpu_ver_lookup[]; + +struct family_string_key { + const char *s; + const unsigned k; +}; + +extern const struct family_string_key family_string_lookup[]; + +struct cpuinfo { + /* Core CPU configuration */ + u32 use_instr; + u32 use_mult; + u32 use_fpu; + u32 use_exc; + u32 ver_code; + u32 mmu; + + /* CPU caches */ + u32 use_icache; + u32 icache_tagbits; + u32 icache_write; + u32 icache_line; + u32 icache_size; + unsigned long icache_base; + unsigned long icache_high; + + u32 use_dcache; + u32 dcache_tagbits; + u32 dcache_write; + u32 dcache_line; + u32 dcache_size; + unsigned long dcache_base; + unsigned long dcache_high; + + /* Bus connections */ + u32 use_dopb; + u32 use_iopb; + u32 use_dlmb; + u32 use_ilmb; + u32 num_fsl; + + /* CPU interrupt line info */ + u32 irq_edge; + u32 irq_positive; + + u32 area_optimised; + + /* HW debug support */ + u32 hw_debug; + u32 num_pc_brk; + u32 num_rd_brk; + u32 num_wr_brk; + u32 cpu_clock_freq; /* store real freq of cpu */ + u32 freq_div_hz; /* store freq/HZ */ + + /* FPGA family */ + u32 fpga_family_code; + + /* User define */ + u32 pvr_user1; + u32 pvr_user2; +}; + +extern struct cpuinfo cpuinfo; + +/* fwd declarations of the various CPUinfo populators */ +void setup_cpuinfo(void); + +void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu); +void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu); + +static inline unsigned int fcpu(struct device_node *cpu, char *n) +{ + int *val; + return (val = (int *) of_get_property(cpu, n, NULL)) ? *val : 0; +} + +#endif /* _ASM_MICROBLAZE_CPUINFO_H */ |