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authorGreg Ungerer <gerg@snapgear.com>2008-02-01 17:34:08 +1000
committerLinus Torvalds <torvalds@linux-foundation.org>2008-02-01 20:54:03 +1100
commitcf64c233839e97221d63ed7887b59196c8c748c3 (patch)
tree2d83cc2619ced36f48eb1737383712f456354fc2 /arch/m68knommu
parent9685c43e4ea7e7267afd30157ca22af4e21e2767 (diff)
downloadop-kernel-dev-cf64c233839e97221d63ed7887b59196c8c748c3.zip
op-kernel-dev-cf64c233839e97221d63ed7887b59196c8c748c3.tar.gz
m68knommu: platform setup for 5206e ColdFire parts
Switch to platform style configuration for 5206e ColdFire parts. Initial support is for the UARTs. DMA support is moved to common code. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/m68knommu')
-rw-r--r--arch/m68knommu/platform/5206e/config.c66
1 files changed, 57 insertions, 9 deletions
diff --git a/arch/m68knommu/platform/5206e/config.c b/arch/m68knommu/platform/5206e/config.c
index f84a4ae..b555b5c 100644
--- a/arch/m68knommu/platform/5206e/config.c
+++ b/arch/m68knommu/platform/5206e/config.c
@@ -10,8 +10,9 @@
#include <linux/kernel.h>
#include <linux/param.h>
+#include <linux/init.h>
#include <linux/interrupt.h>
-#include <asm/dma.h>
+#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
@@ -23,15 +24,51 @@ void coldfire_reset(void);
/***************************************************************************/
-/*
- * DMA channel base address table.
- */
-unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
- MCF_MBAR + MCFDMA_BASE0,
- MCF_MBAR + MCFDMA_BASE1,
+static struct mcf_platform_uart m5206e_uart_platform[] = {
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE1,
+ .irq = 73,
+ },
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE2,
+ .irq = 74,
+ },
+ { },
+};
+
+static struct platform_device m5206e_uart = {
+ .name = "mcfuart",
+ .id = 0,
+ .dev.platform_data = m5206e_uart_platform,
};
-unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
+static struct platform_device *m5206e_devices[] __initdata = {
+ &m5206e_uart,
+};
+
+/***************************************************************************/
+
+static void __init m5206_uart_init_line(int line, int irq)
+{
+ if (line == 0) {
+ writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+ writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
+ mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+ } else if (line == 1) {
+ writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+ writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
+ mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+ }
+}
+
+static void __init m5206e_uarts_init(void)
+{
+ const int nrlines = ARRAY_SIZE(m5206e_uart_platform);
+ int line;
+
+ for (line = 0; (line < nrlines); line++)
+ m5206e_uart_init_line(line, m5206e_uart_platform[line].irq);
+}
/***************************************************************************/
@@ -85,7 +122,7 @@ int mcf_timerirqpending(int timer)
/***************************************************************************/
-void config_BSP(char *commandp, int size)
+void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
@@ -99,3 +136,14 @@ void config_BSP(char *commandp, int size)
}
/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+ m5206e_uarts_init();
+ platform_add_devices(m5206e_devices, ARRAY_SIZE(m5206e_devices));
+ return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
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