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authorGreg Ungerer <gerg@uclinux.org>2010-11-02 17:40:37 +1000
committerGreg Ungerer <gerg@uclinux.org>2011-01-05 15:19:17 +1000
commit733f31b764061d976a60c5ee454632d9562900ea (patch)
tree7e7d5bceb6d6815c54a4c0ab37dddbd53dbe41a5 /arch/m68k
parent7fc82b655a169039d8a58fde609b5e778573d5ab (diff)
downloadop-kernel-dev-733f31b764061d976a60c5ee454632d9562900ea.zip
op-kernel-dev-733f31b764061d976a60c5ee454632d9562900ea.tar.gz
m68knommu: fix clock rate value reported for ColdFire 54xx parts
The instruction timings of the ColdFire 54xx family parts are different to other version 4 parts (or version 2 or 3 parts for that matter too). Move the instruction timing setting into the ColdFire part specific headers, and set the 54xx value appropriately. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k')
-rw-r--r--arch/m68k/include/asm/m5206sim.h3
-rw-r--r--arch/m68k/include/asm/m520xsim.h3
-rw-r--r--arch/m68k/include/asm/m523xsim.h3
-rw-r--r--arch/m68k/include/asm/m5249sim.h3
-rw-r--r--arch/m68k/include/asm/m5272sim.h3
-rw-r--r--arch/m68k/include/asm/m527xsim.h3
-rw-r--r--arch/m68k/include/asm/m528xsim.h3
-rw-r--r--arch/m68k/include/asm/m5307sim.h3
-rw-r--r--arch/m68k/include/asm/m532xsim.h3
-rw-r--r--arch/m68k/include/asm/m5407sim.h3
-rw-r--r--arch/m68k/include/asm/m54xxsim.h5
11 files changed, 23 insertions, 12 deletions
diff --git a/arch/m68k/include/asm/m5206sim.h b/arch/m68k/include/asm/m5206sim.h
index 6cc7a42..b882a21 100644
--- a/arch/m68k/include/asm/m5206sim.h
+++ b/arch/m68k/include/asm/m5206sim.h
@@ -12,7 +12,8 @@
#define m5206sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5206)"
+#define CPU_NAME "COLDFIRE(m5206)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 5206 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index afa2118..85b39ed 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -11,7 +11,8 @@
#define m520xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m520x)"
+#define CPU_NAME "COLDFIRE(m520x)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 520x SIM register set addresses.
diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index 6a2c90d..9d597dc 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -11,7 +11,8 @@
#define m523xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m523x)"
+#define CPU_NAME "COLDFIRE(m523x)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 523x SIM register set addresses.
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 6c49ed8..c107228 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -11,7 +11,8 @@
#define m5249sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5249)"
+#define CPU_NAME "COLDFIRE(m5249)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 5249 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 7edef8f..8cea714 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -12,7 +12,8 @@
#define m5272sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5272)"
+#define CPU_NAME "COLDFIRE(m5272)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 5272 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 627156a..5223b71 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -11,7 +11,8 @@
#define m527xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m527x)"
+#define CPU_NAME "COLDFIRE(m527x)"
+#define CPU_INSTR_PER_JIFFY 3
/*
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 03a6d57..4e35f97 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -11,7 +11,8 @@
#define m528xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m528x)"
+#define CPU_NAME "COLDFIRE(m528x)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 5280/5282 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index 3e06b83..008f36b 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -14,7 +14,8 @@
#define m5307sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5307)"
+#define CPU_NAME "COLDFIRE(m5307)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 5307 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h
index 9f4688b..b8126d3 100644
--- a/arch/m68k/include/asm/m532xsim.h
+++ b/arch/m68k/include/asm/m532xsim.h
@@ -9,7 +9,8 @@
#define m532xsim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m532x)"
+#define CPU_NAME "COLDFIRE(m532x)"
+#define CPU_INSTR_PER_JIFFY 3
#define MCF_REG32(x) (*(volatile unsigned long *)(x))
#define MCF_REG16(x) (*(volatile unsigned short *)(x))
diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index 1de44c5..e07d4d8 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -14,7 +14,8 @@
#define m5407sim_h
/****************************************************************************/
-#define CPU_NAME "COLDFIRE(m5407)"
+#define CPU_NAME "COLDFIRE(m5407)"
+#define CPU_INSTR_PER_JIFFY 3
/*
* Define the 5407 SIM register set addresses.
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index d69a64f..6072248 100644
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -5,9 +5,10 @@
#ifndef m54xxsim_h
#define m54xxsim_h
-#define CPU_NAME "COLDFIRE(m54xx)"
+#define CPU_NAME "COLDFIRE(m54xx)"
+#define CPU_INSTR_PER_JIFFY 2
-#define MCFINT_VECBASE 64
+#define MCFINT_VECBASE 64
/*
* Interrupt Controller Registers
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