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authorGreg Ungerer <gerg@uclinux.org>2011-12-24 00:36:03 +1000
committerGreg Ungerer <gerg@uclinux.org>2012-03-05 09:43:06 +1000
commit909159feb3415afc6300281c9dfa856aa3875c32 (patch)
tree0e6d7131e36a6fd108c90f8e1e8101827afceb7c /arch/m68k/platform/5307
parent20e681fdfa077b6a4e0fb777f10aa3c4bf34ece8 (diff)
downloadop-kernel-dev-909159feb3415afc6300281c9dfa856aa3875c32.zip
op-kernel-dev-909159feb3415afc6300281c9dfa856aa3875c32.tar.gz
m68knommu: make 5307 UART platform addressing consistent
If we make all UART addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 5307 UART addressing so that: . UARTs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform/5307')
-rw-r--r--arch/m68k/platform/5307/config.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/m68k/platform/5307/config.c b/arch/m68k/platform/5307/config.c
index 6bf7c1c..dc9ecf0 100644
--- a/arch/m68k/platform/5307/config.c
+++ b/arch/m68k/platform/5307/config.c
@@ -31,12 +31,12 @@ unsigned char ledbank = 0xff;
static struct mcf_platform_uart m5307_uart_platform[] = {
{
- .mapbase = MCF_MBAR + MCFUART_BASE1,
- .irq = 73,
+ .mapbase = MCFUART_BASE0,
+ .irq = MCF_IRQ_UART0,
},
{
- .mapbase = MCF_MBAR + MCFUART_BASE2,
- .irq = 74,
+ .mapbase = MCFUART_BASE1,
+ .irq = MCF_IRQ_UART1,
},
{ },
};
@@ -57,11 +57,11 @@ static void __init m5307_uart_init_line(int line, int irq)
{
if (line == 0) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
- writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
+ writeb(irq, MCFUART_BASE0 + MCFUART_UIVR);
mcf_mapirq2imr(irq, MCFINTC_UART0);
} else if (line == 1) {
writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
- writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
+ writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
mcf_mapirq2imr(irq, MCFINTC_UART1);
}
}
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