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| author | Greg Ungerer <gerg@uclinux.org> | 2011-12-24 01:23:35 +1000 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2012-03-05 09:43:08 +1000 |
| commit | 55148f6f886a1b77dba1a5c3169208606827b9db (patch) | |
| tree | 17e77390b22a390a6fe9897fe0f1b086319097ae /arch/m68k/platform/5206 | |
| parent | 0d2fe946474196e586e492d9e9b381e184c774ea (diff) | |
| download | op-kernel-dev-55148f6f886a1b77dba1a5c3169208606827b9db.zip op-kernel-dev-55148f6f886a1b77dba1a5c3169208606827b9db.tar.gz | |
m68knommu: merge common ColdFire UART IRQ setup
Some ColdFire CPU UART hardware modules can configure the IRQ they use.
Currently the same setup code is duplicated in the init code for each of
these ColdFire CPUs. Merge all this code to a single instance.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/platform/5206')
| -rw-r--r-- | arch/m68k/platform/5206/config.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/m68k/platform/5206/config.c b/arch/m68k/platform/5206/config.c index fdef300..aca6253 100644 --- a/arch/m68k/platform/5206/config.c +++ b/arch/m68k/platform/5206/config.c @@ -16,22 +16,6 @@ #include <asm/machdep.h> #include <asm/coldfire.h> #include <asm/mcfsim.h> -#include <asm/mcfuart.h> - -/***************************************************************************/ - -static void __init m5206_uarts_init(void) -{ - /* UART0 interrupt setup */ - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR); - writeb(MCF_IRQ_UART0, MCFUART_BASE0 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART0, MCFINTC_UART0); - - /* UART1 interrupt setup */ - writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR); - writeb(MCF_IRQ_UART1, MCFUART_BASE1 + MCFUART_UIVR); - mcf_mapirq2imr(MCF_IRQ_UART1, MCFINTC_UART1); -} /***************************************************************************/ @@ -74,7 +58,6 @@ void __init config_BSP(char *commandp, int size) mach_reset = m5206_cpu_reset; mach_sched_init = hw_timer_init; m5206_timers_init(); - m5206_uarts_init(); /* Only support the external interrupts on their primary level */ mcf_mapirq2imr(25, MCFINTC_EINT1); |
