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authorGreg Ungerer <gerg@uclinux.org>2011-12-24 10:05:34 +1000
committerGreg Ungerer <gerg@uclinux.org>2012-03-05 09:43:08 +1000
commitd4e08372e385169fdd3cb8cccd1f37892fd216d9 (patch)
treeb651e5c9b39db5f1ab19c3ac81d2a795134946c4 /arch/m68k/include
parent55148f6f886a1b77dba1a5c3169208606827b9db (diff)
downloadop-kernel-dev-d4e08372e385169fdd3cb8cccd1f37892fd216d9.zip
op-kernel-dev-d4e08372e385169fdd3cb8cccd1f37892fd216d9.tar.gz
m68knommu: make 520x FEC platform addressing consistent
If we make all FEC (ethernet) addressing consistent across all ColdFire family members then we will be able to remove the duplicated plaform data and use a single setup for all. So modify the ColdFire 520x FEC addressing so that: . FECs are numbered from 0 up . base addresses are absolute (not relative to MBAR peripheral register) . use a common name for IRQs used Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include')
-rw-r--r--arch/m68k/include/asm/m520xsim.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h
index 41ed4dc..b83cee2 100644
--- a/arch/m68k/include/asm/m520xsim.h
+++ b/arch/m68k/include/asm/m520xsim.h
@@ -48,12 +48,19 @@
#define MCFINT_UART1 27 /* Interrupt number for UART1 */
#define MCFINT_UART2 28 /* Interrupt number for UART2 */
#define MCFINT_QSPI 31 /* Interrupt number for QSPI */
+#define MCFINT_FECRX0 36 /* Interrupt number for FEC RX */
+#define MCFINT_FECTX0 40 /* Interrupt number for FEC RX */
+#define MCFINT_FECENTC0 42 /* Interrupt number for FEC RX */
#define MCFINT_PIT1 4 /* Interrupt number for PIT1 (PIT0 in processor) */
#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
+#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
+#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
+#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
+
/*
* SDRAM configuration registers.
*/
@@ -155,8 +162,8 @@
/*
* FEC module.
*/
-#define MCFFEC_BASE 0xFC030000 /* Base of FEC ethernet */
-#define MCFFEC_SIZE 0x800 /* Register set size */
+#define MCFFEC_BASE0 0xFC030000 /* Base of FEC ethernet */
+#define MCFFEC_SIZE0 0x800 /* Register set size */
/*
* Reset Control Unit.
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