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authorBryan Sutula <Bryan.Sutula@hp.com>2005-10-05 11:02:06 -0600
committerTony Luck <tony.luck@intel.com>2005-10-06 15:04:11 -0700
commit76e677e25dd3d8af77d0b3810eacaacaf2f93f2f (patch)
treebe96c432f97e0390d615acf0a162671705d6570e /arch/ia64
parentc0758146adbe39514e75ac860ce7e49f865c2297 (diff)
downloadop-kernel-dev-76e677e25dd3d8af77d0b3810eacaacaf2f93f2f.zip
op-kernel-dev-76e677e25dd3d8af77d0b3810eacaacaf2f93f2f.tar.gz
[IA64] Avoid kernel hang during CMC interrupt storm
I've noticed a kernel hang during a storm of CMC interrupts, which was tracked down to the continual execution of the interrupt handler. There's code in the CMC handler that's supposed to disable CMC interrupts and switch to polling mode when it sees a bunch of CMCs. Because disabling CMCs across all CPUs isn't safe in interrupt context, the disable is done with a schedule_work(). But with continual CMC interrupts, the schedule_work() never gets executed. The following patch immediately disables CMC interrupts for the current CPU. This then allows (at least) one CPU to ignore CMC interrupts, execute the schedule_work() code, and disable CMC interrupts on the rest of the CPUs. Acked-by: Keith Owens <kaos@sgi.com> Signed-off-by: Bryan Sutula <Bryan.Sutula@hp.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/kernel/mca.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 6dc726a..d0a5106 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -1016,6 +1016,11 @@ ia64_mca_cmc_int_handler(int cmc_irq, void *arg, struct pt_regs *ptregs)
cmc_polling_enabled = 1;
spin_unlock(&cmc_history_lock);
+ /* If we're being hit with CMC interrupts, we won't
+ * ever execute the schedule_work() below. Need to
+ * disable CMC interrupts on this processor now.
+ */
+ ia64_mca_cmc_vector_disable(NULL);
schedule_work(&cmc_disable_work);
/*
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