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authorMike Habeck <habeck@sgi.com>2007-11-26 11:19:57 -0600
committerTony Luck <tony.luck@intel.com>2007-12-07 16:11:37 -0800
commitafc2cf35b43ca58bd73b86b2f72af8b9bdb67ab8 (patch)
tree7f89e7dbcc3b5cfe4dbb881e159b9ecaa4634164 /arch/ia64/sn
parent9e004ebd2dab980d663784d096aa6dc449225bd8 (diff)
downloadop-kernel-dev-afc2cf35b43ca58bd73b86b2f72af8b9bdb67ab8.zip
op-kernel-dev-afc2cf35b43ca58bd73b86b2f72af8b9bdb67ab8.tar.gz
[IA64] SGI Altix : fix bug in sn_io_late_init()
When initializing pci_controller->node to point to the closest node we need to take into consideration that a PIC PCI Bridge ASIC can be connected to a headless/memless node just like the TIOCP and TIOCE Bridge ASICs Signed-off-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/sn')
-rw-r--r--arch/ia64/sn/kernel/io_common.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/ia64/sn/kernel/io_common.c b/arch/ia64/sn/kernel/io_common.c
index 4594770..f3250c1 100644
--- a/arch/ia64/sn/kernel/io_common.c
+++ b/arch/ia64/sn/kernel/io_common.c
@@ -545,19 +545,18 @@ sn_io_late_init(void)
nasid = NASID_GET(bussoft->bs_base);
cnode = nasid_to_cnodeid(nasid);
if ((bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) ||
- (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCE)) {
- /* TIO PCI Bridge: find nearest node with CPUs */
+ (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCE) ||
+ (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_PIC)) {
+ /* PCI Bridge: find nearest node with CPUs */
int e = sn_hwperf_get_nearest_node(cnode, NULL,
&near_cnode);
if (e < 0) {
near_cnode = (cnodeid_t)-1; /* use any node */
- printk(KERN_WARNING "pcibr_bus_fixup: failed "
- "to find near node with CPUs to TIO "
+ printk(KERN_WARNING "sn_io_late_init: failed "
+ "to find near node with CPUs for "
"node %d, err=%d\n", cnode, e);
}
PCI_CONTROLLER(bus)->node = near_cnode;
- } else if (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_PIC) {
- PCI_CONTROLLER(bus)->node = cnode;
}
}
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