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authorSimon Arlott <simon@fire.lp0.eu>2007-05-11 14:55:43 -0700
committerTony Luck <tony.luck@intel.com>2007-05-11 14:55:43 -0700
commit72fdbdce3d52282f8ea95f512e871791256754e6 (patch)
treeb7d544875c5d89e10859f3e5dc97e2e064a00e54 /arch/ia64/kernel/time.c
parent0a3fd051c7036ef71b58863f8e5da7c3dabd9d3f (diff)
downloadop-kernel-dev-72fdbdce3d52282f8ea95f512e871791256754e6.zip
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[IA64] spelling fixes: arch/ia64/
Spelling and apostrophe fixes in arch/ia64/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/time.c')
-rw-r--r--arch/ia64/kernel/time.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/kernel/time.c b/arch/ia64/kernel/time.c
index a06667c..bf7e7b5 100644
--- a/arch/ia64/kernel/time.c
+++ b/arch/ia64/kernel/time.c
@@ -216,7 +216,7 @@ ia64_init_itm (void)
#ifdef CONFIG_SMP
/* On IA64 in an SMP configuration ITCs are never accurately synchronized.
* Jitter compensation requires a cmpxchg which may limit
- * the scalability of the syscalls for retrieving time.
+ * the scalibility of the syscalls for retrieving time.
* The ITC synchronization is usually successful to within a few
* ITC ticks but this is not a sure thing. If you need to improve
* timer performance in SMP situations then boot the kernel with the
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