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authorMike Miller (OS Dev) <mikem@beardog.cca.cpqcorp.net>2007-10-17 10:10:04 +0200
committerJens Axboe <jens.axboe@oracle.com>2007-10-17 10:10:04 +0200
commit8bf50f71cbfc7d043f0f135da72b3feefeaa0eb8 (patch)
tree0472a163acf62a47bd45ec16ab698dd63648cdeb /arch/ia64/hp
parent9e91fdb32d449a6b57f8236a793ae2f3df79b4d8 (diff)
downloadop-kernel-dev-8bf50f71cbfc7d043f0f135da72b3feefeaa0eb8.zip
op-kernel-dev-8bf50f71cbfc7d043f0f135da72b3feefeaa0eb8.tar.gz
cciss: disable DMA refetch on Smart Array P600
This patch disables DMA refetch in the PCI bridge. We have disabled DMA prefetch for quite some time. Testing with XEN revealed another ASIC bug. If dom0 resides on a P600 the board can can an MCA bi accessing invalid memory addresses. Apparently, we need to disable both prefetch and refetch. My understanding is a refetch operation should not occur but it is a valid thing to do if prefetched data is no longer available for whatever reason. Please consider this patch for inclusion. Signed-off-by: Mike Miller <mike.miller@hp.com> Signed-off-by: Alex Chiang <achiang@hp.com> -------------------------------------------------------------------------------- Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
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