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author | Robin Holt <holt@sgi.com> | 2005-11-11 09:35:43 -0600 |
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committer | Tony Luck <tony.luck@intel.com> | 2005-11-11 09:37:29 -0800 |
commit | 837cd0bdf54dd954cd6aa43d250f75ab5db79617 (patch) | |
tree | ef28b91f1ac8c1c9f4244da9be1f994306ef4070 /arch/ia64/Kconfig | |
parent | d12eb7e11cf30c30f639b2093735af2ac177830b (diff) | |
download | op-kernel-dev-837cd0bdf54dd954cd6aa43d250f75ab5db79617.zip op-kernel-dev-837cd0bdf54dd954cd6aa43d250f75ab5db79617.tar.gz |
[IA64] 4-level page tables
This patch introduces 4-level page tables to ia64. I have run
some benchmarks and found nothing interesting. Performance has
consistently fallen within the noise range.
It also introduces a config option (setting the default to 3
levels). The config option prevents having 4 level page
tables with 64k base page size.
Signed-off-by: Robin Holt <holt@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/Kconfig')
-rw-r--r-- | arch/ia64/Kconfig | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index d4de8a4..8796e12 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -164,6 +164,19 @@ config IA64_PAGE_SIZE_64KB endchoice +choice + prompt "Page Table Levels" + default PGTABLE_3 + +config PGTABLE_3 + bool "3 Levels" + +config PGTABLE_4 + depends on !IA64_PAGE_SIZE_64KB + bool "4 Levels" + +endchoice + source kernel/Kconfig.hz config IA64_BRL_EMU |