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authorLoic Prylli <loic@myri.com>2007-07-06 02:39:52 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-06 10:23:43 -0700
commitd25c1ba2fa1a9a1a4f68bef8edb0efefd79f0012 (patch)
tree105a72189d2783bfbca1ffda4f5ebf968ac69496 /arch/i386/kernel/cpu
parent1e2e99f0e4aa6363e8515ed17011c210c8f1b52a (diff)
downloadop-kernel-dev-d25c1ba2fa1a9a1a4f68bef8edb0efefd79f0012.zip
op-kernel-dev-d25c1ba2fa1a9a1a4f68bef8edb0efefd79f0012.tar.gz
MTRR: Fix race causing set_mtrr to go into infinite loop
Processors synchronization in set_mtrr requires the .gate field to be set after .count field is properly initialized. Without an explicit barrier, the compiler was reordering those memory stores. That was sometimes causing a processor (in ipi_handler) to see the .gate change and decrement .count before the latter is set by set_mtrr() (which then hangs in a infinite loop with irqs disabled). Signed-off-by: Loic Prylli <loic@myri.com> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/i386/kernel/cpu')
-rw-r--r--arch/i386/kernel/cpu/mtrr/main.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/i386/kernel/cpu/mtrr/main.c b/arch/i386/kernel/cpu/mtrr/main.c
index 55b0051..75dc6d5 100644
--- a/arch/i386/kernel/cpu/mtrr/main.c
+++ b/arch/i386/kernel/cpu/mtrr/main.c
@@ -229,6 +229,8 @@ static void set_mtrr(unsigned int reg, unsigned long base,
data.smp_size = size;
data.smp_type = type;
atomic_set(&data.count, num_booting_cpus() - 1);
+ /* make sure data.count is visible before unleashing other CPUs */
+ smp_wmb();
atomic_set(&data.gate,0);
/* Start the ball rolling on other CPUs */
@@ -242,6 +244,7 @@ static void set_mtrr(unsigned int reg, unsigned long base,
/* ok, reset count and toggle gate */
atomic_set(&data.count, num_booting_cpus() - 1);
+ smp_wmb();
atomic_set(&data.gate,1);
/* do our MTRR business */
@@ -260,6 +263,7 @@ static void set_mtrr(unsigned int reg, unsigned long base,
cpu_relax();
atomic_set(&data.count, num_booting_cpus() - 1);
+ smp_wmb();
atomic_set(&data.gate,0);
/*
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