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| author | Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | 2005-09-03 15:56:31 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@evo.osdl.org> | 2005-09-05 00:06:10 -0700 |
| commit | 911a62d42365076209e2c327e7688db296e35d62 (patch) | |
| tree | 51e6d8525cd3547ea43129b5dd20339655674d57 /arch/i386/kernel/cpu/intel_cacheinfo.c | |
| parent | 484b90c4b965d54037ff99b198d84cdf144f8a35 (diff) | |
| download | op-kernel-dev-911a62d42365076209e2c327e7688db296e35d62.zip op-kernel-dev-911a62d42365076209e2c327e7688db296e35d62.tar.gz | |
[PATCH] x86: sutomatically enable bigsmp when we have more than 8 CPUs
i386 generic subarchitecture requires explicit dmi strings or command line
to enable bigsmp mode. The patch below removes that restriction, and uses
bigsmp as soon as it finds more than 8 logical CPUs, Intel processors and
xAPIC support.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/cpu/intel_cacheinfo.c')
0 files changed, 0 insertions, 0 deletions
