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| author | Andi Kleen <ak@suse.de> | 2006-06-26 13:56:13 +0200 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-26 10:48:14 -0700 |
| commit | 240cd6a80642da528bfa382ec2ae4e3cb8991ea7 (patch) | |
| tree | 6c24052ea167a2fd7e0be93c167e9e7da5bddd2b /arch/i386/kernel/cpu/amd.c | |
| parent | faee9a5dc9d8399cc3b1b8e18b6d7ff7b17f1af1 (diff) | |
| download | op-kernel-dev-240cd6a80642da528bfa382ec2ae4e3cb8991ea7.zip op-kernel-dev-240cd6a80642da528bfa382ec2ae4e3cb8991ea7.tar.gz | |
[PATCH] i386/x86-64: Emulate CPUID4 on AMD
Intel systems report the cache level data from CPUID 4 in sysfs.
Add a CPUID 4 emulation for AMD CPUs to report the same
information for them. This allows programs to read this
information in a uniform way.
The AMD way to report this is less flexible so some assumptions
are hardcoded (e.g. no L3)
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/cpu/amd.c')
| -rw-r--r-- | arch/i386/kernel/cpu/amd.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c index b9c93d9..fd0457c 100644 --- a/arch/i386/kernel/cpu/amd.c +++ b/arch/i386/kernel/cpu/amd.c @@ -242,6 +242,8 @@ static void __init init_amd(struct cpuinfo_x86 *c) } #endif + if (cpuid_eax(0x80000000) >= 0x80000006) + num_cache_leaves = 3; } static unsigned int amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) |
