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authorJesper Nilsson <jespern@axis.com>2012-06-20 17:17:10 +0200
committerJesper Nilsson <jespern@axis.com>2012-10-03 09:57:01 +0200
commitd75d806cbbfb9c775e87779cd281c9c408c7aba3 (patch)
tree64abfceb6e6a084c90cf7b2be60c72fc5935de84 /arch/cris/include
parent227c6fc296cb84577a4ec54b3c682d48a9ca09b3 (diff)
downloadop-kernel-dev-d75d806cbbfb9c775e87779cd281c9c408c7aba3.zip
op-kernel-dev-d75d806cbbfb9c775e87779cd281c9c408c7aba3.tar.gz
CRIS: Remove VCS simulator specific code
The VCS simulator was a tool used in the development of the chip and is no longer used or necessary. Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
Diffstat (limited to 'arch/cris/include')
-rw-r--r--arch/cris/include/arch-v32/arch/page.h5
-rw-r--r--arch/cris/include/arch-v32/arch/processor.h6
-rw-r--r--arch/cris/include/arch-v32/mach-fs/mach/startup.inc6
3 files changed, 1 insertions, 16 deletions
diff --git a/arch/cris/include/arch-v32/arch/page.h b/arch/cris/include/arch-v32/arch/page.h
index 20f1b48..e5b5aab 100644
--- a/arch/cris/include/arch-v32/arch/page.h
+++ b/arch/cris/include/arch-v32/arch/page.h
@@ -11,13 +11,8 @@
* selected bit it's possible to convert between KSEG_x and 0x40000000 where the
* DRAM really resides. DRAM is virtually at 0xc.
*/
-#ifndef CONFIG_ETRAX_VCS_SIM
#define __pa(x) ((unsigned long)(x) & 0x7fffffff)
#define __va(x) ((void *)((unsigned long)(x) | 0x80000000))
-#else
-#define __pa(x) ((unsigned long)(x) & 0x3fffffff)
-#define __va(x) ((void *)((unsigned long)(x) | 0xc0000000))
-#endif
#define VM_STACK_DEFAULT_FLAGS (VM_READ | VM_WRITE | \
VM_MAYREAD | VM_MAYWRITE)
diff --git a/arch/cris/include/arch-v32/arch/processor.h b/arch/cris/include/arch-v32/arch/processor.h
index 9603c90..a024b7d 100644
--- a/arch/cris/include/arch-v32/arch/processor.h
+++ b/arch/cris/include/arch-v32/arch/processor.h
@@ -21,13 +21,9 @@ struct thread_struct {
/*
* User-space process size. This is hardcoded into a few places, so don't
- * changed it unless everything's clear!
+ * change it unless everything's clear!
*/
-#ifndef CONFIG_ETRAX_VCS_SIM
#define TASK_SIZE (0xB0000000UL)
-#else
-#define TASK_SIZE (0xA0000000UL)
-#endif
/* CCS I=1, enable interrupts. */
#define INIT_THREAD { 0, 0, (1 << I_CCS_BITNR) }
diff --git a/arch/cris/include/arch-v32/mach-fs/mach/startup.inc b/arch/cris/include/arch-v32/mach-fs/mach/startup.inc
index dd1abbd..96c3b0f 100644
--- a/arch/cris/include/arch-v32/mach-fs/mach/startup.inc
+++ b/arch/cris/include/arch-v32/mach-fs/mach/startup.inc
@@ -71,12 +71,6 @@
move.d REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg), $r0
move.d CONFIG_ETRAX_MEM_GRP4_CONFIG, $r1
move.d $r1, [$r0]
-#ifdef CONFIG_ETRAX_VCS_SIM
- ;; Set up minimal flash waitstates
- move.d 0, $r10
- move.d REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg), $r11
- move.d $r10, [$r11]
-#endif
.endm
#endif
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