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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-09-05 20:05:11 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2012-09-05 20:05:11 +0800 |
| commit | 75d8f2931a803b803cb4a850448460475c20f30b (patch) | |
| tree | 9853b9084fa55609c8e4abbc1763bc500e05da50 /arch/c6x | |
| parent | ffb690d5aa36d38d7bed7579e3f07b84ff6b3a08 (diff) | |
| parent | e93c7d1bc350189511d32cec2f0af79c30e7fa47 (diff) | |
| download | op-kernel-dev-75d8f2931a803b803cb4a850448460475c20f30b.zip op-kernel-dev-75d8f2931a803b803cb4a850448460475c20f30b.tar.gz | |
Merge branch 'asoc-omap' into for-3.7
Diffstat (limited to 'arch/c6x')
| -rw-r--r-- | arch/c6x/Kconfig | 1 | ||||
| -rw-r--r-- | arch/c6x/include/asm/cache.h | 16 |
2 files changed, 12 insertions, 5 deletions
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig index 052f81a..983c859 100644 --- a/arch/c6x/Kconfig +++ b/arch/c6x/Kconfig @@ -6,6 +6,7 @@ config C6X def_bool y select CLKDEV_LOOKUP + select GENERIC_ATOMIC64 select GENERIC_IRQ_SHOW select HAVE_ARCH_TRACEHOOK select HAVE_DMA_API_DEBUG diff --git a/arch/c6x/include/asm/cache.h b/arch/c6x/include/asm/cache.h index 6d521d9..09c5a0f 100644 --- a/arch/c6x/include/asm/cache.h +++ b/arch/c6x/include/asm/cache.h @@ -1,7 +1,7 @@ /* * Port on Texas Instruments TMS320C6x architecture * - * Copyright (C) 2005, 2006, 2009, 2010 Texas Instruments Incorporated + * Copyright (C) 2005, 2006, 2009, 2010, 2012 Texas Instruments Incorporated * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) * * This program is free software; you can redistribute it and/or modify @@ -16,9 +16,14 @@ /* * Cache line size */ -#define L1D_CACHE_BYTES 64 -#define L1P_CACHE_BYTES 32 -#define L2_CACHE_BYTES 128 +#define L1D_CACHE_SHIFT 6 +#define L1D_CACHE_BYTES (1 << L1D_CACHE_SHIFT) + +#define L1P_CACHE_SHIFT 5 +#define L1P_CACHE_BYTES (1 << L1P_CACHE_SHIFT) + +#define L2_CACHE_SHIFT 7 +#define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT) /* * L2 used as cache @@ -29,7 +34,8 @@ * For practical reasons the L1_CACHE_BYTES defines should not be smaller than * the L2 line size */ -#define L1_CACHE_BYTES L2_CACHE_BYTES +#define L1_CACHE_SHIFT L2_CACHE_SHIFT +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) #define L2_CACHE_ALIGN_LOW(x) \ (((x) & ~(L2_CACHE_BYTES - 1))) |
