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authorSonic Zhang <sonic.zhang@analog.com>2012-05-15 14:17:35 +0800
committerBob Liu <lliubbo@gmail.com>2012-05-21 14:54:58 +0800
commit913f2f2df797c45e92ab527022cd49deb6eee3ab (patch)
treeecdc3b59ec9aec482792d8e77179702b7c77c23a /arch/blackfin
parent8bf7135fff46f6ac28baf28a8e4144f685b456a0 (diff)
downloadop-kernel-dev-913f2f2df797c45e92ab527022cd49deb6eee3ab.zip
op-kernel-dev-913f2f2df797c45e92ab527022cd49deb6eee3ab.tar.gz
blackfin: bf60x: anomaly: Add a temporary anomaly 0501001
Add a temporary anomaly 0501001 for data loss in MMR reading if interrupted. Add work around for bfin serial driver as well. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
Diffstat (limited to 'arch/blackfin')
-rw-r--r--arch/blackfin/include/asm/bfin_serial.h12
-rw-r--r--arch/blackfin/mach-bf609/include/mach/anomaly.h2
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/bfin_serial.h b/arch/blackfin/include/asm/bfin_serial.h
index 235c72a..8597158 100644
--- a/arch/blackfin/include/asm/bfin_serial.h
+++ b/arch/blackfin/include/asm/bfin_serial.h
@@ -282,7 +282,19 @@ struct bfin_uart_regs {
#define UART_GET_GCTL(p) UART_GET_CTL(p)
#define UART_GET_LCR(p) UART_GET_CTL(p)
#define UART_GET_MCR(p) UART_GET_CTL(p)
+#if ANOMALY_05001001
+#define UART_GET_STAT(p) \
+({ \
+ u32 __ret; \
+ unsigned long flags; \
+ flags = hard_local_irq_save(); \
+ __ret = bfin_read32(port_membase(p) + OFFSET_STAT); \
+ hard_local_irq_restore(flags); \
+ __ret; \
+})
+#else
#define UART_GET_STAT(p) bfin_read32(port_membase(p) + OFFSET_STAT)
+#endif
#define UART_GET_MSR(p) UART_GET_STAT(p)
#define UART_PUT_CHAR(p, v) bfin_write32(port_membase(p) + OFFSET_THR, v)
diff --git a/arch/blackfin/mach-bf609/include/mach/anomaly.h b/arch/blackfin/mach-bf609/include/mach/anomaly.h
index 97a9c65..bdd39ae 100644
--- a/arch/blackfin/mach-bf609/include/mach/anomaly.h
+++ b/arch/blackfin/mach-bf609/include/mach/anomaly.h
@@ -57,6 +57,8 @@
#define ANOMALY_05000481 (1)
/* IFLUSH sucks at life */
#define ANOMALY_05000491 (1)
+/* Tempopary anomaly ID for data loss in MMR read operation if interrupted */
+#define ANOMALY_05001001 (__SILICON_REVISION__ < 1)
/* Anomalies that don't exist on this proc */
#define ANOMALY_05000099 (0)
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