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| author | Wolfgang Muees <wolfgang.mues@auerswald.de> | 2009-04-06 19:00:53 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-04-07 08:31:06 -0700 |
| commit | 93b61bddc13d9acf1fe341b39d826e80f3182d1e (patch) | |
| tree | 54a5b574ada4b619a9cba845bee1e4205d62176c /arch/blackfin | |
| parent | 42c78b2bf51bafb4cfa98dfecc28dd9b8bcd04b0 (diff) | |
| download | op-kernel-dev-93b61bddc13d9acf1fe341b39d826e80f3182d1e.zip op-kernel-dev-93b61bddc13d9acf1fe341b39d826e80f3182d1e.tar.gz | |
Blackfin SPI Driver: Make mmc_spi driver work on Blackfin
1. Rewrite of the non-dma data transfer functions to use only ONE mode
of TIMOD (TIMOD=0x1). With TIMOD=0, it was not possible to set the TX
bit pattern. So the TDBR = 0xFFFF inside the read calls won't work.
2. Clear SPI_RDBR before reading and before duplex transfer.
Otherwise the garbage data in RDBR will get read. Since mmc_spi uses a
lot of duplex transfers, this is the main cause of mmc_spi failure.
3. Poll RXS for transfer completion. Polling SPIF or TXS cannot
guarantee transfer completion. This may interrupt a transfer before it
is finished. Also this may leave garbage data in buffer and affect
next transfer.
[Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct
bfin5xx_spi_chip" to specify the value to transmit if no TX value
is supplied.]
Signed-off-by: Wolfgang Muees <wolfgang.mues@auerswald.de>
Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Cc: David Brownell <david-b@pacbell.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/blackfin')
| -rw-r--r-- | arch/blackfin/include/asm/bfin5xx_spi.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h index 8c5f8a9..aaeb4df 100644 --- a/arch/blackfin/include/asm/bfin5xx_spi.h +++ b/arch/blackfin/include/asm/bfin5xx_spi.h @@ -125,6 +125,8 @@ struct bfin5xx_spi_chip { u8 cs_change_per_word; u16 cs_chg_udelay; /* Some devices require 16-bit delays */ u32 cs_gpio; + /* Value to send if no TX value is supplied, usually 0x0 or 0xFFFF */ + u16 idle_tx_val; }; #endif /* _SPI_CHANNEL_H_ */ |
