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| author | Michael Hennerich <michael.hennerich@analog.com> | 2008-02-25 12:04:57 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-02-25 12:04:57 +0800 |
| commit | fe9ec9b9698b95ad21617c1db21eb0d1c040b93d (patch) | |
| tree | 43a7cab7941c9ac34389e924f655762c0e227e60 /arch/blackfin/mach-common/ints-priority.c | |
| parent | 181afa94989f431e93eccd784c14c37ccb395a00 (diff) | |
| download | op-kernel-dev-fe9ec9b9698b95ad21617c1db21eb0d1c040b93d.zip op-kernel-dev-fe9ec9b9698b95ad21617c1db21eb0d1c040b93d.tar.gz | |
[Blackfin] arch: fix bug - Move IWR Enable All to the end of init_arch_irq otherwise it fails
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common/ints-priority.c')
| -rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 880595a..b321c4a 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -969,15 +969,11 @@ int __init init_arch_irq(void) #if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) bfin_write_SIC_IMASK0(SIC_UNMASK_ALL); bfin_write_SIC_IMASK1(SIC_UNMASK_ALL); - bfin_write_SIC_IWR0(IWR_ENABLE_ALL); - bfin_write_SIC_IWR1(IWR_ENABLE_ALL); # ifdef CONFIG_BF54x bfin_write_SIC_IMASK2(SIC_UNMASK_ALL); - bfin_write_SIC_IWR2(IWR_ENABLE_ALL); # endif #else bfin_write_SIC_IMASK(SIC_UNMASK_ALL); - bfin_write_SIC_IWR(IWR_ENABLE_ALL); #endif SSYNC(); @@ -1106,6 +1102,16 @@ int __init init_arch_irq(void) IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; +#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) + bfin_write_SIC_IWR0(IWR_ENABLE_ALL); + bfin_write_SIC_IWR1(IWR_ENABLE_ALL); +# ifdef CONFIG_BF54x + bfin_write_SIC_IWR2(IWR_ENABLE_ALL); +# endif +#else + bfin_write_SIC_IWR(IWR_ENABLE_ALL); +#endif + return 0; } |
