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authorMike Frysinger <vapier@gentoo.org>2011-02-02 22:31:42 -0500
committerMike Frysinger <vapier@gentoo.org>2011-03-18 04:01:03 -0400
commit820b127dae869cbbd2133f066e8b8f32a90d46e5 (patch)
tree792ffece1051b81b1c678174129663680d54253b /arch/blackfin/mach-common/arch_checks.c
parent567ebfc99d7546913408b560ad443a5315bf8a53 (diff)
downloadop-kernel-dev-820b127dae869cbbd2133f066e8b8f32a90d46e5.zip
op-kernel-dev-820b127dae869cbbd2133f066e8b8f32a90d46e5.tar.gz
Blackfin: split optimization settings more
We need to place icache flush funcs into L1 inst sram to work around a hardware anomaly. But this currently breaks SMP support as the L1 inst sram is per-core and cannot be called directly. So in preparation for making that work, split the two options. Further, split out the SMP depend so that we can allow some for SMP. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-common/arch_checks.c')
-rw-r--r--arch/blackfin/mach-common/arch_checks.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index bceb981..d8643fd 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -61,6 +61,6 @@
# error "Anomaly 05000220 does not allow you to use Write Back cache with L2 or External Memory"
#endif
-#if ANOMALY_05000491 && !defined(CONFIG_CACHE_FLUSH_L1)
+#if ANOMALY_05000491 && !defined(CONFIG_ICACHE_FLUSH_L1)
# error You need IFLUSH in L1 inst while Anomaly 05000491 applies
#endif
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