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authorMike Frysinger <vapier@gentoo.org>2010-10-25 08:04:44 +0000
committerMike Frysinger <vapier@gentoo.org>2011-01-10 07:18:05 -0500
commit9346dba55672a6f04b7bfd1faa081ff149995a3f (patch)
tree78720838d17b73ab0a535fa907df9b805f5a7442 /arch/blackfin/mach-bf533
parent6c8e75a06c8ee32c68ce90afa4a0fe093327b0e4 (diff)
downloadop-kernel-dev-9346dba55672a6f04b7bfd1faa081ff149995a3f.zip
op-kernel-dev-9346dba55672a6f04b7bfd1faa081ff149995a3f.tar.gz
Blackfin: standardize DMAC traffic control MMRs & MDMA MMRs
Use the same naming convention for DMA traffic MMRs (most were legacy anyways) so we can avoid useless ifdef trees. Same goes for MDMA names -- this actually allows us to undo a bunch of ifdef redirects that existed for this purpose alone. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf533')
-rw-r--r--arch/blackfin/mach-bf533/include/mach/cdefBF532.h14
-rw-r--r--arch/blackfin/mach-bf533/include/mach/defBF532.h8
2 files changed, 6 insertions, 16 deletions
diff --git a/arch/blackfin/mach-bf533/include/mach/cdefBF532.h b/arch/blackfin/mach-bf533/include/mach/cdefBF532.h
index 401e524..e149550 100644
--- a/arch/blackfin/mach-bf533/include/mach/cdefBF532.h
+++ b/arch/blackfin/mach-bf533/include/mach/cdefBF532.h
@@ -66,16 +66,10 @@
#define bfin_write_RTC_PREN(val) bfin_write16(RTC_PREN,val)
/* DMA Traffic controls */
-#define bfin_read_DMA_TCPER() bfin_read16(DMA_TCPER)
-#define bfin_write_DMA_TCPER(val) bfin_write16(DMA_TCPER,val)
-#define bfin_read_DMA_TCCNT() bfin_read16(DMA_TCCNT)
-#define bfin_write_DMA_TCCNT(val) bfin_write16(DMA_TCCNT,val)
-
-/* Alternate deprecated register names (below) provided for backwards code compatibility */
-#define bfin_read_DMA_TC_PER() bfin_read16(DMA_TC_PER)
-#define bfin_write_DMA_TC_PER(val) bfin_write16(DMA_TC_PER,val)
-#define bfin_read_DMA_TC_CNT() bfin_read16(DMA_TC_CNT)
-#define bfin_write_DMA_TC_CNT(val) bfin_write16(DMA_TC_CNT,val)
+#define bfin_read_DMAC_TC_PER() bfin_read16(DMAC_TC_PER)
+#define bfin_write_DMAC_TC_PER(val) bfin_write16(DMAC_TC_PER,val)
+#define bfin_read_DMAC_TC_CNT() bfin_read16(DMAC_TC_CNT)
+#define bfin_write_DMAC_TC_CNT(val) bfin_write16(DMAC_TC_CNT,val)
/* General Purpose IO (0xFFC0 2400-0xFFC0 27FF) */
#define bfin_read_FIO_DIR() bfin_read16(FIO_DIR)
diff --git a/arch/blackfin/mach-bf533/include/mach/defBF532.h b/arch/blackfin/mach-bf533/include/mach/defBF532.h
index 8e8099b..44415e5 100644
--- a/arch/blackfin/mach-bf533/include/mach/defBF532.h
+++ b/arch/blackfin/mach-bf533/include/mach/defBF532.h
@@ -182,12 +182,8 @@
#define EBIU_SDSTAT 0xFFC00A1C /* SDRAM Status Register */
/* DMA Traffic controls */
-#define DMA_TC_PER 0xFFC00B0C /* Traffic Control Periods Register */
-#define DMA_TC_CNT 0xFFC00B10 /* Traffic Control Current Counts Register */
-
-/* Alternate deprecated register names (below) provided for backwards code compatibility */
-#define DMA_TCPER 0xFFC00B0C /* Traffic Control Periods Register */
-#define DMA_TCCNT 0xFFC00B10 /* Traffic Control Current Counts Register */
+#define DMAC_TC_PER 0xFFC00B0C /* Traffic Control Periods Register */
+#define DMAC_TC_CNT 0xFFC00B10 /* Traffic Control Current Counts Register */
/* DMA Controller (0xFFC00C00 - 0xFFC00FFF) */
#define DMA0_CONFIG 0xFFC00C08 /* DMA Channel 0 Configuration Register */
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