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authorSonic Zhang <sonic.zhang@analog.com>2009-02-04 16:49:45 +0800
committerBryan Wu <cooloney@kernel.org>2009-02-04 16:49:45 +0800
commitb52dae3139066765a7d96563e9cd33d9e60efe33 (patch)
treeda26ba9d26fc0c89bd19261815cf7dfa09499152 /arch/blackfin/mach-bf518
parent5b93e13ffa8b06ff80eaa8e0ae92e44ebf61cde9 (diff)
downloadop-kernel-dev-b52dae3139066765a7d96563e9cd33d9e60efe33.zip
op-kernel-dev-b52dae3139066765a7d96563e9cd33d9e60efe33.tar.gz
Blackfin arch: Fix bug - Run "reboot" hangs bf518-ezbrd
[Mike Frysinger <vapier.adi@gmail.com>: - setup P_DEFAULT_BOOT_SPI_CS for every arch based on the default bootrom behavior and convert all our boards to it - revert previous anomaly change ... bf51x is not affected by anomaly 05000353] Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-bf518')
-rw-r--r--arch/blackfin/mach-bf518/boards/ezbrd.c2
-rw-r--r--arch/blackfin/mach-bf518/include/mach/portmux.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c
index 15f1351..ee003f4 100644
--- a/arch/blackfin/mach-bf518/boards/ezbrd.c
+++ b/arch/blackfin/mach-bf518/boards/ezbrd.c
@@ -649,7 +649,7 @@ void native_machine_restart(char *cmd)
{
/* workaround reboot hang when booting from SPI */
if ((bfin_read_SYSCR() & 0x7) == 0x3)
- bfin_gpio_reset_spi0_ssel1();
+ bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
}
void bfin_get_ether_addr(char *addr)
diff --git a/arch/blackfin/mach-bf518/include/mach/portmux.h b/arch/blackfin/mach-bf518/include/mach/portmux.h
index ac16d54..f618b48 100644
--- a/arch/blackfin/mach-bf518/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf518/include/mach/portmux.h
@@ -103,6 +103,8 @@
#define P_SPI1_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(2))
#define P_SPI1_SSEL5 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(2))
+#define P_DEFAULT_BOOT_SPI_CS P_SPI0_SSEL2
+
/* SPORT Port Mux */
#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0))
#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0))
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