diff options
| author | Sonic Zhang <sonic.zhang@analog.com> | 2008-07-19 15:42:41 +0800 |
|---|---|---|
| committer | Bryan Wu <cooloney@kernel.org> | 2008-07-19 15:42:41 +0800 |
| commit | 262c3825a9f3eb0f4f30ebb4b1ee57397bcb3ffc (patch) | |
| tree | fb5402f0de002d3e7a6671820228a2b9808d831f /arch/blackfin/kernel/vmlinux.lds.S | |
| parent | bafcc1b97323261a42d47960db99947bcc1be133 (diff) | |
| download | op-kernel-dev-262c3825a9f3eb0f4f30ebb4b1ee57397bcb3ffc.zip op-kernel-dev-262c3825a9f3eb0f4f30ebb4b1ee57397bcb3ffc.tar.gz | |
Blackfin arch: Extend sram malloc to handle L2 SRAM.
Extend system call to alloc L2 SRAM in application.
Automatically move following sections to L2 SRAM:
1. kernel built-in l2 attribute section
2. kernel module l2 attribute section
3. elf-fdpic application l2 attribute section
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/kernel/vmlinux.lds.S')
| -rw-r--r-- | arch/blackfin/kernel/vmlinux.lds.S | 40 |
1 files changed, 35 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/vmlinux.lds.S b/arch/blackfin/kernel/vmlinux.lds.S index 3ecc64c..0896e38 100644 --- a/arch/blackfin/kernel/vmlinux.lds.S +++ b/arch/blackfin/kernel/vmlinux.lds.S @@ -101,6 +101,11 @@ SECTIONS #if !L1_DATA_B_LENGTH *(.l1.data.B) #endif +#ifndef L2_LENGTH + . = ALIGN(32); + *(.data_l2.cacheline_aligned) + *(.l2.data) +#endif DATA_DATA *(.data.*) @@ -182,14 +187,13 @@ SECTIONS *(.l1.data) __edata_l1 = .; - . = ALIGN(4); - __sbss_l1 = .; - *(.l1.bss) - . = ALIGN(32); *(.data_l1.cacheline_aligned) . = ALIGN(4); + __sbss_l1 = .; + *(.l1.bss) + . = ALIGN(4); __ebss_l1 = .; } @@ -203,11 +207,37 @@ SECTIONS . = ALIGN(4); __sbss_b_l1 = .; *(.l1.bss.B) - . = ALIGN(4); __ebss_b_l1 = .; } +#ifdef L2_LENGTH + __l2_lma_start = .; + + .text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1)) + { + . = ALIGN(4); + __stext_l2 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l2 = .; + + . = ALIGN(4); + __sdata_l2 = .; + *(.l1.data) + __edata_l2 = .; + + . = ALIGN(32); + *(.data_l2.cacheline_aligned) + + . = ALIGN(4); + __sbss_l2 = .; + *(.l1.bss) + . = ALIGN(4); + __ebss_l2 = .; + } +#endif + /* Force trailing alignment of our init section so that when we * free our init memory, we don't leave behind a partial page. */ |
